Document
TTK101MFV
For ECM
TOSHIBA Field Effect Transistor Silicon N Channel Junction Type
TTK101MFV
Application for compact ECM Thin package: 0.5mm Low capacitance: Ciss = 1.8 pF (typ.) @VDS = 2 V, VGS = 0, f = 1MHz Low noise: VN = 15 mV (typ.)
@VDD=2 V, RK=1kΩ, Cg=10pF, GV=80dB, A-Cuve Filter
Absolute Maximum Ratings (Ta=25°C)
Characteristic
Symbol
Rating
Unit
Gate-drain voltage Gate current Drain power dissipation Junction temperature Storage temperature range
VGDO
-20
V
IG
10
mA
PD (Note 1)
150
mW
Tj
125
°C
Tstg
−55 to 125
°C
Note:
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc).
Note 1: Mounted on FR4 board (25.4 mm × 25.4 mm × 1.6 t)
0.22±0.05
0.32±0.05
Unit: mm
1.2±0.05 0.8±0.05
1 3
2
1.2±0.05 0.8±0.05 0.4 0.4
0.13±0.05
0.5±0.05
VESM
1.Drain 2.Source 3.Gate
JEDEC
-
JEITA
-
TOSHIBA
2-1L1C
Weight: 1.5mg (typ.)
0.5mm 0.45mm 0.45mm
0.4mm
Marking
I
Type Name
IDSS Classification Symbol
1: A-Rank 2: B-Rank IDSS Classification A-Rank 140 to 240 μA B-Rank 210 to 340 μA
1
Equivalent Circuit
D
G
S
Start of commercial production
2009-03 2014-03-01
Electrical Characteristics (Ta=25°C)
TTK101MFV
Characteristic
Symbol
Test Condition
Min Typ. Max Unit
Drain current
IDSS VDS = 2 V, VGS = 0
A 140 ⎯ 240 µA
B 210 ⎯ 350
Drain current
ID
VDD = 2 V, RL= 2.2kΩ,Cg = 5pF
A 125 ⎯ 260 µA
B 190 ⎯ 370
Gate-source cut-off voltage VGS(OFF) VDS = 2 V, ID = 1μA Forward transfer admittance |Yfs| VDS = 2 V, VGS = 0V
-0.1 ⎯ -1.0 V 0.65 0.9 ⎯ mS
Gate-drain breakdown voltage
V(BR)GDO IG = -100 μA
-20
⎯
⎯
V
Input capacitance Voltage gain
Ciss VDS = 2 V, VGS = 0, f = 1 MHz Gv VDD = 2V, RL= 2.2kΩ,Cg = 5pF, f = 1kHz,vin=100mV
⎯
1.8
⎯
pF
A -2.7 -1.3 ⎯ dB
B -1.8 -0.6 ⎯
Delta voltage gain Delta voltage gain
DGv(f) VDD = 2V, RL= 2.2kΩ,Cg = 5pF,f = 1kHz to 100Hz,vin=100mV ⎯
0
-1.0 dB
DGv(V)
VDD = 2 V to 1.5 V, RL = 2.2 kΩ, Cg = 5pF,f = 1kHz, vin=100mV
A ⎯ -0.7 -1.4 dB
B ⎯ -1.4 -3.0
Noise voltage Total harmonic distortion
VN VDD = 2 V, RL = 1 kΩ, Cg = 10 pF, Gv = 80 dB, A-Curve Filter ⎯
15
30 mV
A ⎯ 1.1 ⎯
THD VDD = 2 V, RL = 2.2kΩ, Cg = 5 pF, f = 1kHz, vin = 50mV
%
B ⎯ 0.6 ⎯
Time output stability
tos VDD = 2 V, RL = 2.2 kΩ, Cg = 5 pF
⎯
20
50
ms
Time Output Stability Test Method
a) TEST CIRCUIT
b) TEST SIGNAL
5pF 2.2k Ω
VDD = 2.0V Vout
VDD 2V
0V Vout
VDD-ID*RL
0V
50% 90%
tos
2
2014-03-01
Drain Current I D ((uμAA))
ID - VGS
400 VDS=2V Common Source Ta= 2 5 ℃
300.