74AUP2G3404

74AUP2G3404 BUFFER AND INVERTER Description The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications. The 74AUP2G3404 has one buffer and one inverter. Both gates have push-pull outputs designed for operation over a power supply range of 0.8V to 3.6V. The device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output preventing damaging current backflow when the device is powered down. Pin Assignments NEW PRODUCT ADVANCED INFORMATION ADVANCED INFORMATION NEW PRODUCT Features Advanced Ultra Low Power (AUP) CMOS Supply Voltage Range from 0.8V to 3.6V ± 4mA Output Drive at 3.0V Low Static power consumption ƒ ƒ ICC < 0.9µA CPD = 6pF Typical at 3.6V Low Dynamic Power Consumption Schmitt Trigger Action at All Inputs Make the Circuit Tolerant for Slower Input Rise and Fall Time. The hysteresis is typically 250mV at VCC = 3.0V IOFF Supports Partial-Power-Down Mode Operation ƒ ƒ ƒ ƒ ESD Protection per JESD 22 Exceeds 200-V Machine Model (A115) Exceeds 2000-V Human Body Model (A114-) Exceeds 1000-V Charged Device Model (C101) Applications Suited for battery and low power needs Wide array of products such as: ƒ ƒ ƒ ƒ ƒ ƒ PCs, networking, Notebooks, Netbooks, PDAs Tablet Computers, E-Readers Computer Peripherals, Hard Drives, CD/DVD ROM TV, DVD, DVR, Set Top Box Cell Phones, Personal Navigation / GPS MP3 players ,Cameras, Video Recorders La...