Document
Si826x
5 KV LED EMULATOR INPUT, 4.0 A ISOLATED GATE DRIVERS
Features
Pin-compatible, drop-in upgrades for popular high speed opto-coupled gate drivers Low power diode emulator simplifies design-in process 0.6 and 4.0 Amp peak output drive current Rail-to-rail output voltage Performance and reliability advantages vs. opto-drivers Resistant to temperature and age 10x lower FIT rate for longer service life 14x tighter part-to-part matching Higher common-mode transient immunity: >50 kV/µs typical
Robust protection features Multiple UVLO ordering options (5, 8, and 12 V) with hysteresis 60 ns propagation delay, independent of input drive current Wide VDD range: 5 to 30 V 3.75 and 5 kV reinforced isolation UL, CSA, VDE AEC-Q100 qualified Wide operating temperature range –40 to +125 °C RoHS-compliant packages SOIC-8 (Narrow body) DIP8 (Gull-wing) SDIP6 (Stretched SO-6) LGA8
Pin Assignments: See page 24
1
UVLO
8
VDD
ANODE
2 e
7
VO
CATHODE
3
6
VO
NC
4
5
GND
SOIC-8, DIP8, LGA8 Industry Standard Pinout
ANODE 1
6
UVLO
VDD
Applications
IGBT/ MOSFET gate drives Industrial, HEV and renewable energy inverters AC, Brushless and DC motor controls and drives
Variable speed motor control in consumer white goods Isolated switch mode and UPS power supplies
NC 2
e
5
VO
CATHODE 3
4
GND
SDIP6 Industry Standard Pinout
Safety Regulatory Approvals (Pending)
UL 1577 recognized VDE certification conformity Up to 5000 Vrms for 1 minute IEC60747-5-2/VDE0884 Part 10 (basic/reinforced insulation) CSA component notice 5A approval CQC certification approval IEC 60950-1, 61010-1, 60601-1 (reinforced insulation) GB4943.1
Patent pending
Description
The Si826x isolators are pin-compatible, drop-in upgrades for popular optocoupled gate drivers, such as 0.6 A ACPL-0302/3020, 2.5 A HCPL-3120/ACPL3130, HCNW3120/3130, and similar opto-drivers. The devices are ideal for driving power MOSFETs and IGBTs used in a wide variety of inverter and motor control applications. The Si826x isolated gate drivers utilize Silicon Laboratories' proprietary silicon isolation technology, supporting up to 5.0 kVRMS withstand voltage per UL1577. This technology enables higher-performance, reduced variation with temperature and age, tighter part-to-part matching, and superior common-mode rejection compared to opto-coupled gate drivers. While the input circuit mimics the characteristics of an LED, less drive current is required, resulting in higher efficiency. Propagation delay time is independent of input drive current, resulting in consistently short propagation times, tighter unit-to-unit variation, and greater input circuit design flexibility. As a result, the Si826x series offers longer service life and dramatically higher reliability compared to optocoupled gate drivers.
Preliminary Rev. 0.9 4/13
Copyright © 2013 by Silicon Laboratories
Si826x
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
Free Datasheet http://www.datasheet4u.com/
Si826x
Functional Block Diagram
Diode Emulator
VDD
A1
XMIT IF
REC
Output Driver
OUT
C1 GND
Diode Emulator Model and I-V Curve
3.0
2.5
10
V[V]
2.0
Anode 2.2 V 700 Cathode
1.5
1.0
0.5
0.0 0 5 10 15 I[mA] 20 25 30
2
Preliminary Rev. 0.9
Free Datasheet http://www.datasheet4u.com/
Si826x TABLE O F C ONTENTS
Section Page
1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 2. Regulatory Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 3. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.1. Theory of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4. Technical Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 4.1. Device Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 4.2. Device Startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 4.3. Under Voltage Lockout (UVLO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5. Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.1. Input Circuit Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.2. Output Circuit Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5.3. Layout Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..