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. d e STC12C5A60S2 series MCU t i m i L STC12LE5A60S2 series MCU U C Data M Sheet C T S
STC MCU Limited
www.STCMCU.com
Update date: 2011-7-15
STC MCU Limited.
website:www.STCMCU.com
Free Datasheet http://www.datasheet4u.com/
CONTENTS
Chapter 1. Introduction. .................................................................8
1.1 Features................................................................................................... 8 1.2 Block diagram......................................................................................... 9 1.3 Pin Configurations . .............................................................................. 10 1.4 STC12C5A60S2 series Selection Table................................................ 13 1.5 STC12C5A60S2 series Minimum Application System........................ 16 1.6 STC12C5A60S2 series Application Circuit for ISP.............................. 18 1.7 Pin Descriptions.................................................................................... 20 1.8 Package Dimension Drawings. .............................................................. 21 1.9 STC12C5A60S2 series MCU naming rules.......................................... 26 1.10 Global Unique Identification Number (ID)......................................... 27 2.1 Clock..................................................................................................... 30
2.1.1 2.1.2 2.1.3 2.1.4 On-Chip R/C Clock and External Crystal/Clcok are Optional in STC-ISP.exe .. 30 Divider for System Clock .................................................................................... 31 How to Know Internal RC Oscillator frequency(Internal clock frequency) ....... 32 Programmable Clock Output................................................................................ 35
Chapter 2. Clock, Power Management and Reset.....................30
2.2 Power Management Modes................................................................... 39
2.2.1 Slow Down Mode................................................................................................. 40 2.2.2 Idle Mode.............................................................................................................. 41 2.2.3 Stop / Power Down (PD) Mode............................................................................ 42 2.3.2 2.3.3 2.3.4 2.3.5 2.3.5 2.3.3 2.3.8 External Low Voltage Detection Reset (high reliable Reset, RST2 pin Reset).... 49 External Low Voltage Detection if not be used RST2 can be as Interrupt........... 50 Software RESET. .................................................................................................. 54 Power-On Reset (POR). ........................................................................................ 54 MAX810 power-on-Reset delay........................................................................... 55 Watch-Dog-Timer................................................................................................. 56 Warm Boot and Cold Boot Reset. ......................................................................... 60
2.1.4.1 Timer 0 Programmable Clock-out on P3.4..........................................................................37 2.1.4.2 Timer 1 Programmable Clock-out on P3.5..........................................................................38 2.1.4.3 Baud Rate Generator and Programmable Clock Output on P1.0........................................38
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2.3 RESET Sources..................................................................................... 48
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Chapter 3. Memory Organization...............................................61
3.1 Program Memory.................................................................................. 61 3.2 Data Memory. ........................................................................................ 62
3.2.1 On-chip Scratch-Pad RAM................................................................................... 62 3.2.2 Auxiliary RAM..................................................................................................... 64 3.2.3 External Expandable 64KB RAM (Off-Chip RAM)............................................ 70 3.3.1 Special Function Registers Address Map............................................................. 73 3.3.2 Special Function Registers Bits Description........................................................ 74 3.3.3 Dual Data Pointer Register (DPTR)..................................................................... 78
3.3 Special Function Registers.................................................................... 73
Chapter 4. Configurable I/O Ports of STC12C5Axx series......80
4.1 I/O Ports Configurations....................................................................... 80 4.2 P4/P5 of STC12C5A60S2 ser.