Document
5-Bit or 6-Bit Programmable 2-,3-,4-Phase Synchronous Buck Controller ADP3181
FEATURES
Selectable 2-, 3- or 4-phase operation at up to 1 MHz per phase ±14.5 mV worst-case mV differential sensing error over temperature Logic-level PWM outputs for interface to external high power drivers Active current balancing between all output phases Built-in power good/crowbar blanking supports on-the-fly VID code changes Digitally programmable output can be switched between VRM 9 (5-bit) and VRD 10 (6-bit) VID codes Programmable short-circuit protection with programmable latch-off delay
FUNCTIONAL BLOCK DIAGRAM
VCC
28
RAMPADJ RT
14 13
ADP3181
EN 11 GND 19 DAC + 300mV CSREF CURRENTBALANCING CIRCUIT CMP RESET 2-/3-/4-PHASE DRIVER LOGIC RESET RESET CURRENT LIMIT
23 22 26
UVLO SHUTDOWN AND BIAS
OSCILLATOR CMP SET RESET EN
27
PWM1 PWM2
CMP DAC – 250mV CMP PWRGD 10 DELAY
25
PWM3 PWM4
24
CROWBAR
SW1 SW2 SW3 SW4 CSSUM CSREF CSCOMP
APPLICATIONS
Desktop PC power supplies for: Next-generation Intel® processors VRM modules
ILIMIT 15 EN CURRENTLIMITING CIRCUIT
21 20 17 16
DELAY 12
GENERAL DESCRIPTION
The ADP3181 is a highly efficient multiphase synchronous buck-switching regulator controller optimized for converting a 12 V main supply into the core supply voltage required by high performance Intel processors. It uses an internal 6-bit DAC to read a voltage identification (VID) code directly from the processor, which is used to set the output voltage. The CPUID input selects whether the DAC codes match the VRM 9 or VRD 10 specifications. It uses a multimode PWM architecture to drive the logic-level outputs at a programmable switching frequency that can be optimized for VR size and efficiency. The phase relationship of the output signals can be programmed to provide 2-, 3-, or 4-phase operation, allowing for the construction of up to four complementary buck-switching stages. The ADP3181 also includes programmable no-load offset and slope functions to adjust the output voltage as a function of the load current so that it is always optimally positioned for a system transient. The ADP3181 provides accurate and reliable short-circuit protection, adjustable current limiting, and a delayed power good output that accommodates on-the-fly output voltage changes requested by the CPU. The device is specified over the commercial temperature range of 0°C to +85°C and is available in a 28-lead TSSOP package.
COMP 9
18
SOFT START
8
FB
http://www.DataSheet4U.net/
PRECISION REFERENCE
VID DAC
1 2 3 4 5
04796-0-001
datasheet pdf - http://www.DataSheet4U.net/
7
6
FBRTN CPUID
VID4 VID3 VID2 VID1 VID0
Figure 1.
Rev. 0
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ADP3181
TABLE OF CONTENTS
Specifications..................................................................................... 3 Test Circuits....................................................................................... 5 Absolute Maximum Ratings............................................................ 6 Pin Configuration and Function Descriptions............................. 7 Typical Performance Characteristics ............................................. 8 Theory of Operation ........................................................................ 9 Start-up Sequence......................................................................... 9 Master Clock Frequency............................................................ 10 Output Voltage Differential Sensing ........................................ 10 Output Current Sensing ............................................................ 11 Active Impedance Control Mode............................................. 11 Current Control Mode and Thermal Balance ....................... 11 Voltage Control Mode................................................................ 11 Soft Start ...................................................................................... 12 Current Limit, Short-Circuit, and Latch-Off Protection....... 12 Dynamic VID.............................................................................. 13 Power Good Monitoring ........................................................... 13 Output Crowbar ......................................................................... 13 Output Enable and UVLO ........................................................ 13 Application Information.........