DAC1627D1G25

DAC1627D1G25 Dual 16-bit DAC, LVDS interface, up to 1.25 Gsps, x2, x4 and x8 interpolating Rev. 1 — 29 April 2011 Objective data sheet 1. General description The DAC1627D1G25 is a high-speed 16-bit dual channel Digital-to-Analog Converter (DAC) with selectable ×2, ×4 and ×8 interpolating filters optimized for multi-carrier and broadband wireless transmitters at sample rates of up to 1.25 Gsps. Supplied from a 3.3 V and a 1.8 V source, the DAC1627D1G25 integrates a differential scalable output current up to 31.8 mA. The DAC1627D1G25 is capable of meeting multi-carrier GSM specifications. For example, with an output frequency of 150 MHz and a DAC clock frequency of 1.22 Gsps the full-scale dynamic range is: SFDRRBW = 85 dBc (bandwidth = 250 MHz) IMD3 = 85 dBc The Serial Peripheral Interface (SPI) provides full control of the DAC1627D1G25. The DAC1627D1G25 integrates a Low Voltage Differential Signaling (LVDS) Double Data Rate (DDR) receiver interface, with an on-chip 100 Ω termination. The LVDS DDR interface accepts a multiplex input data stream such as interleaved or folded. An internal LVDS input auto-calibration ensures the robustness and stability of the interface. http://www.DataSheet4U.net/ Digital on-chip modulation converts the complex I and Q inputs from baseband to IF. The mixer frequency is set by a 40-bit Numerically Controlled Oscillator (NCO). High resolution internal gain, phase and offset control provide outstanding image and Local Oscillator (LO) signal ...