SKY13448-001

PRELIMINARY DATA SHEET SKY13448-001: 0.1 – 3.0 GHz SPDT High Power Switch (Single Bit Control) in a WLCSP Package Applications LTE TDD/FDD transmit/receive GSM transmit Embedded modules Features Broadband frequency range: 0.1 to 3.0 GHz Low insertion loss: 0.5 dB @ 2.7 GHz High isolation: 25 dB up to 2.7 GHz No external DC blocking capacitors required Single GPIO control line with VDD voltage regulator: − VCTL = 1.65 to 2.70 V − VDD = 2.45 to 3.00 V Small, 8-bump WLCSP, 200 μm diameter, 400 μm pitch (1.1 x 1.1 x 0.36 mm) package (MSL1, 260 °C per JEDEC J-STD-020) Figure 1. SKY13448-001 Block Diagram Description http://www.DataSheet4U.net/ The SKY13448-001 is a Single-Pole, Double-Throw (SPDT) LTE/WCDMA/GSM transmit switch. Switching is controlled by an integrated GPIO interface with a single control pin. Depending on the logic voltage level applied to the control pin, the antenna port is connected to one of the switched RF outputs (RF1 or RF2) through a low insertion loss path, while the path between the antenna port and the other RF port is in a high isolation state. No external DC blocking capacitors are required as long as no DC voltage is applied on any RF path. The SKY13448-001 is provided in a compact 8-bump, 1.1 x 1.1 x 0.36 mm Wafer Level Chip Scale Package (WLCSP) that meets requirements for board-level assembly. Bump diameters are 200 microns with a minimum bump pitch of 400 microns. A functional block diagram is shown in Figure 1. The pin co...