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2N5566 Dataheets PDF



Part Number 2N5566
Manufacturers Vishay Siliconix
Logo Vishay Siliconix
Description Matched N-Channel JFET
Datasheet 2N5566 Datasheet2N5566 Datasheet (PDF)

2N5564/5565/5566 Vishay Siliconix Matched N-Channel JFET Pairs PRODUCT SUMMARY Part Number 2N5564 2N5565 2N5566 VGS(off) (V) −0.5 to −3 −0.5 to −3 −0.5 to −3 V(BR)GSS Min (V) −40 −40 −40 gfs Min (mS) 7.5 7.5 7.5 IG Typ (pA) −3 −3 −3 jVGS1 − VGS2j Max (mV) 5 10 20 FEATURES D Two-Chip Design D High Slew Rate D Low Offset/Drift Voltage D Low Gate Leakage: 3 pA D Low Noise: 12 nV⁄√Hz @ 10 Hz D Good CMRR: 76 dB D Minimum Parasitics BENEFITS D Tight Differential Match vs. Current D Improved O.

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2N5564/5565/5566 Vishay Siliconix Matched N-Channel JFET Pairs PRODUCT SUMMARY Part Number 2N5564 2N5565 2N5566 VGS(off) (V) −0.5 to −3 −0.5 to −3 −0.5 to −3 V(BR)GSS Min (V) −40 −40 −40 gfs Min (mS) 7.5 7.5 7.5 IG Typ (pA) −3 −3 −3 jVGS1 − VGS2j Max (mV) 5 10 20 FEATURES D Two-Chip Design D High Slew Rate D Low Offset/Drift Voltage D Low Gate Leakage: 3 pA D Low Noise: 12 nV⁄√Hz @ 10 Hz D Good CMRR: 76 dB D Minimum Parasitics BENEFITS D Tight Differential Match vs. Current D Improved Op Amp Speed, Settling Time Accuracy D Minimum Input Error/Trimming Requirement D Insignificant Signal Loss/Error Voltage D High System Sensitivity D Minimum Error with Large Input Signals D Maximum High Frequency Performance APPLICATIONS D Wideband Differential Amps D High-Speed, Temp-Compensated, Single-Ended Input Amps D High-Speed Comparators D Impedance Converters D Matched Switches DESCRIPTION The 2N5564/5565/5566 are matched pairs of JFETs mounted in a TO-71 package. This two-chip design reduces parasitics for good performance at high frequency while ensuring extremely tight matching. This series features high breakdown voltage (V(BR)DSS typically > 55 V), high gain (typically > 9 mS), and <5 mV offset between the two die. The hermetically-sealed TO-71 package is available with full military processing (see Military Information). For similar products see the low-noise U/SST401 series, and the low-leakage 2N5196/5197/5198/5199 data sheets. TO-71 S1 1 D1 2 G2 6 5 D2 3 G1 4 S2 Top View ABSOLUTE MAXIMUM RATINGS Gate-Drain, Gate-Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40 V Gate-Gate Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . "80 V Gate Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Lead Temperature (1/16” from case for 10 sec.) . . . . . . . . . . . . . . . . . . 300 _C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65 to 200_C Document Number: 70254 S-50150—Rev. E, 24-Jan-05 Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . −55 to 150_C Power Dissipation : Per Sidea . . . . . . . . . . . . . . . . . . . . . . . . 325 mW Totalb . . . . . . . . . . . . . . . . . . . . . . . . . . . 650 mW Notes a. Derate 2.6 mW/_C above 25_C b. Derate 5.2 mW/_C above 25_C www.vishay.com 1 2N5564/5565/5566 Vishay Siliconix SPECIFICATIONS (TA = 25_C UNLESS OTHERWISE NOTED) Limits 2N5564 2N5565 2N5566 Parameter Symbol Test Conditions Typa Min Max Min Max Min Max Unit Static Gate-Source Breakdown Voltage Gate-Source Cutoff Voltage Saturation Drain Currentb Gate Reverse Current Gate Operating Currentc Drain-Source On-Resistance Gate-Source Voltagec Gate-Source Forward Voltage Dynamic V(BR)GSS VGS(off) IDSS IGSS IG rDS(on) VGS VGS(F) IG = −1 mA, VDS = 0 V VDS = 15 V, ID = 1 nA VDS = 15 V, VGS = 0 V VGS = −20 V, VDS = 0 V TA = 150_C VDG = 15 V, ID = 2 mA TA = 125_C VGS = 0 V, ID = 1 mA VDG = 15 V, ID = 2 mA IG = 2 mA , VDS = 0 V −55 −40 −40 −40 V −2 −0.5 −3 −0.5 −3 −0.5 −3 20 5 30 5 30 5 30 mA −5 −100 −100 −100 pA −10 −200 −200 −200 nA −3 pA −1 nA 50 100 100 100 W −1.2 V 0.7 1 1 1 Common-Source Forward Transconductance gfs Common-Source Output Conductance gos Common-Source Forward Transconductanced gfs Common-Source Input Capacitance Ciss Common-Source Reverse Transfer Crss Capacitance Equivalent Input Noise Voltage en Noise Figure NF Matching VDS = 15 V, ID = 2 mA f = 1 kHz VDS = 15 V, ID = 2 mA f = 100 MHz VDS = 15 V, ID = 2 mA f = 1 MHz VDS = 15 V, ID = 2 mA f = 10 Hz RG = 10 MW 9 7.5 12.5 7.5 12.5 7.5 12.5 mS 35 45 45 45 mS 8.5 7 7 7 mS 10 12 12 12 pF 2.5 3 3 3 12 50 50 50 nV⁄ √Hz 1 1 1 dB Differential Gate-Source Voltage Gate-Source Voltage Differential Change with Temperature |VGS1–VGS2| D|VGS1–VGS2| DT VDG = 15 V, ID = 2 mA VDG = 15 V, ID = 2 mA TA = −55 to 125_C 5 10 20 mV 10 25 50 mV/ _C Saturation Drain Current Ratioc IDSS1 IDSS2 VDS = 15 V, VGS = 0 V 0.98 0.95 1 0.95 1 0.95 1 Transconductance Ratio gfs1 gfs2 VDS = 15 V, ID = 2 mA f = 1 kHz 0.98 0.95 1 0.90 1 0.90 1 Common Mode Rejection Ratioc CMRR VDG = 10 to 20 V ID = 2 mA 76 Notes a. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. b. Pulse test: PW v300 ms duty cycle v3%. c. This parameter not registered with JEDEC. d. Not a production test. dB NCBD Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum.


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