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MB85R1002A

Fujitsu

1 M Bit (64 K x 16)

FUJITSU SEMICONDUCTOR DATA SHEET DS501-00004-0v01-E Memory FRAM CMOS 1 M Bit (64 K × 16) MB85R1002A ■ DESCRIPTIONS T...


Fujitsu

MB85R1002A

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Description
FUJITSU SEMICONDUCTOR DATA SHEET DS501-00004-0v01-E Memory FRAM CMOS 1 M Bit (64 K × 16) MB85R1002A ■ DESCRIPTIONS The MB85R1002A is an FRAM (Ferroelectric Random Access Memory) chip consisting of 65,536 words × 16 bits of nonvolatile memory cells created using ferroelectric process and silicon gate CMOS process technologies. The MB85R1002A is able to retain data without using a back-up battery, as is needed for SRAM. The memory cells used in the MB85R1002A can be used for 1010 read/write operations, which is a significant improvement over the number of read and write operations supported by Flash memory and E2PROM. The MB85R1002A uses a pseudo-SRAM interface that is compatible with conventional asynchronous SRAM. ■ FEATURES Bit configuration Read/write endurance Operating power supply voltage Operating temperature range Data retention LB and UB data byte control Package : 65,536 words × 16 bits : 1010 times : 3.0 V to 3.6 V : − 40 °C to + 85 °C : 10 years ( + 55 °C) : 48-pin plastic TSOP (1) Copyright©2011 FUJITSU SEMICONDUCTOR LIMITED All rights reserved 2011.1 www.DataSheet4U.net MB85R1002A ■ PIN ASSIGNMENTS (TOP VIEW) A15 A14 A13 A12 A11 A10 A9 A8 NC NC WE CE2 VSS UB LB VDD NC A7 A6 A5 A4 A3 A2 A1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 NC NC VSS I/O16 I/O8 I/O15 I/O7 I/O14 I/O6 I/O13 I/O5 VDD I/O12 I/O4 I/O11 I/O3 I/O10 I/O2 I/O9 I/O1 OE VSS CE1 A0 (FPT-48...




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