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P3PS550AH Dataheets PDF



Part Number P3PS550AH
Manufacturers ON Semiconductor
Logo ON Semiconductor
Description High Drive General Purpose Peak EMI Reduction IC
Datasheet P3PS550AH DatasheetP3PS550AH Datasheet (PDF)

P3PS550AH High Drive General Purpose Peak EMI Reduction IC Product Description The P3PS550AH is a versatile 2.3 V to 3.6 V, Timing−Safe™, high drive spread spectrum frequency modulator designed specifically for a wide range of clock frequencies. The P3PS550AH reduces electromagnetic interference (EMI) at the clock source, allowing system wide reduction of EMI of all clock dependent signals. The P3PS550AH allows significant system cost savings by reducing the number of circuit board layers ferri.

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P3PS550AH High Drive General Purpose Peak EMI Reduction IC Product Description The P3PS550AH is a versatile 2.3 V to 3.6 V, Timing−Safe™, high drive spread spectrum frequency modulator designed specifically for a wide range of clock frequencies. The P3PS550AH reduces electromagnetic interference (EMI) at the clock source, allowing system wide reduction of EMI of all clock dependent signals. The P3PS550AH allows significant system cost savings by reducing the number of circuit board layers ferrite beads, shielding that are traditionally required to pass EMI regulations. Features http://onsemi.com MARKING DIAGRAMS 1 WDFN8 CASE 511AQ 1 CCMG G • • • • • • • • High Drive, LVCMOS Peak EMI reduction IC Input Clock Frequency: 18 MHz − 36 MHz Output Clock Frequency: 18 MHz − 36 MHz Eight different selectable Spread options Power Down option for power save Supply Voltage: 2.3 V − 3.6 V 8−pin WDFN, 2 mm x 2 mm (TDFN) Package These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant CC = Specific Device Code M = Date Code G = Pb−Free Device PIN CONFIGURATION CLKIN SR2 PD# VSS 1 2 P3PS550AH 3 4 8 7 6 5 VDD SR0 SR1 ModOUT Applications • The P3PS550AH is targeted towards consumer electronic applications. ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. www.DataSheet4U.com © Semiconductor Components Industries, LLC, 2010 July, 2010 − Rev. 1 1 Publication Order Number: P3PS550AH/D P3PS550AH VDD SR0 SR1 SR2 CLKIN PLL ModOUT VSS PD# Figure 1. Block Diagram P3PS550AH modulates the output of a single PLL in order to “spread” the bandwidth of a synthesized clock, and more importantly, decreases the peak amplitudes of its harmonics. This results in significantly lower system EMI compared to the typical narrow band signal produced by oscillators and most frequency generators. Lowering EMI by increasing a signal’s bandwidth is called ‘spread spectrum clock generation’. Table 1. PIN DESCRIPTION Pin# 1 2 3 Pin Name CLKIN SR2 PD# Type I I I External reference clock input. P3PS550AH accepts an input from an external reference clock and locks to a 1x modulated clock output. SR0, SR1 and SR2 pins enable selecting one of the eight different frequency deviations (Refer Frequency Deviation Selection table). P3PS550AH also features power down option for power save. P3PS550AH operates over a supply voltage range of 2.3 V to 3.6 V. P3PS550AH is available in an 8 Pin WDFN, (2 mm x 2 mm) Package. Description Digital logic input used to select Spreading Range. There is NO default state. Refer Frequency Deviation Selection Table. Power−down control pin. Powers down the entire chip. There is NO default state. Pull low to enable power−down mode. Connect to VDD to disable Power Down. Output Clock will be LOW when power down is enabled Ground connection. Spread Spectrum Clock Output. Digital logic input used to select Spreading Range. This pin has an internal pull−up resistor. Refer Modulation Selection Table. Digital logic input used to select Spreading Range. There is NO default state. Refer Frequency Deviation Selection Table. Power supply for the entire chip 4 5 6 7 8 VSS ModOUT SR1 SR0 VDD P O I I P www.DataSheet4U.com http://onsemi.com 2 P3PS550AH Table 2. FREQUENCY DEVIATION SELECTION TABLE Spreading Range ($ %) SR2 0 0 0 0 1 1 1 1 SR1 0 0 1 1 0 0 1 1 SR0 0 1 0 1 0 1 0 1 (@ 24 MHz) 1 2.5 1.25 1.5 0.4 0.75 1.75 2 Table 3. OPERATING CONDITIONS Symbol VDD TA CL CIN Supply Voltage with respect to VSS Operating temperature Load Capacitance Input Capacitance Parameter Min 2.3 −20 Max 3.6 +85 15 7 Unit V °C pF pF Table 4. ABSOLUTE MAXIMUM RATING Symbol VDD, VIN TSTG Ts TJ TDV Parameter Voltage on any input pin with respect to VSS Storage temperature Max. Soldering Temperature (10 sec) Junction Temperature Static Discharge Voltage (As per JEDEC STD22−A114−B) Rating −0.5 to +4.6 −65 to +125 260 150 2 Unit V °C °C °C kV Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Table 5. DC ELECTRICAL CHARACTERISTICS Symbol VDD VIH VIL IIH IIL VOH VOL IDD ZOUT Parameter Supply Voltage with respect to VSS Input high voltage Input low voltage Input high current (SR1 control pin) Input low current (SR1 control pin) Output high voltage (IOH = − 16 mA) Output low voltage (IOL = 16 mA) Dynamic supply current (Unloaded Output @ 24 MHz) Output impedance 6 20 0.75 * VDD 0.2 * VDD 1 9 Min 2.3 0.65 * VDD 0.3 * VDD 50 50 Typ 2.8 Max 3.6 Unit V V V mA mA V V mA mA W www.DataSheet4U.com ICC Static supply current (PD# pulled to VSS) http://onsemi.com 3 P3PS550AH Table 6. AC ELECTRICAL CHARACTERISTICS Symbol CLKIN ModOUT tLH (Note 1) tHL (Note 1) tJC (Note 1) tD (Note 1) tON (Note 1) Input Clock frequency Output Clock.


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