Document
ST
Sitronix
1. INTRODUCTION
fewest components.
ST7573
132 x 33 Dot Matrix LCD Controller/Driver
ST7573 is a driver & controller LSI for graphic dot-matrix liquid crystal display systems. ST7573 contains 132 segment and 33 common driver circuits. This chip is connected directly to a microprocessor, accepts 3-line, 4-line serial peripheral interface (SPI) or 8-bit parallel interface, display data can stores in an on-chip Display Data RAM (DDRAM) of 132 x 33 bits. It performs Display Data RAM read/write operation with no external operating clock to minimize power consumption. In addition, because it contains power supply circuits to drive liquid crystal, it is possible to make a display system with the
2. FEATURES
Single-chip LCD controller & driver Driver Output Circuits 132 segments / 32 commons + 1 ICON common 132 segments / 16 commons + 1 ICON common 132 segments / 8 commons + 1 ICON common On-chip Display Data RAM (DDRAM) Capacity: 132X33=4356 bits Microprocessor Interface 8-bit parallel bi-directional interface with 6800-series or 8080-series 4-line SPI (serial peripheral interface) available (only write operation) 3-line SPI (serial peripheral interface) available On-chip Low Power Analog Circuit Embedded Boosters with voltage regulation function that generates high-accuracy voltage. Voltage regulation temperature gradient -0.07%/° C Programmable Booster stages: X3,X4. On-chip electronic contrast control function Built-in Voltage Follower generates LCD bias voltages (1/4 to 1/7). Built-in oscillator Built-in oscillator requires no external components (external clock input is also supported) External RESB (reset) pin Supply voltage range VDD - VSS (Digital): 2.4 to 3.3V (typical); VDD2 - VSS (Analog): 2.4 to 3.3V (typical). Display supply voltage range Programmable voltage (LCD Vop): 8.31V (max) Temperature range: -30 to +85 degree
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ST7573
6800 , 8080 , 4-Line , 3-Line interface
Ver 1.0b
1/46
2007/07/12
1 267
5~6
1~5
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VDD2 VDD2 VDD VDD VDD
PAD
6~11
Ver 1.0b
11~12 Chip Size: 49~50 40~49 39~40 12~39
265 264
PAD Pitch:
Bump Height:
Rough layout
ST7573
6 DUMMY DUMMY DUMMY DUMMY DUMMY DUMMY
Reserve Reserve Reserve COMS2 COM15 COM14
Chip Thickness: 480µm
12
60.0 84.5 60.0
84.5
Pitch
15µm
70.0
60.0
89.0
60.0
248
73~96
72~73
50~72
97~115
115~116
116~247
248~267
247~248
24
COM1 COM0 SEG131 SEG130 SEG129 SEG128 SEG127
PAD
6074µm(X) x 720µm(Y)
31
57.0
34.0
34.0
60.0
70.0
60.0
Pitch
34.0
57.0
37
Reverse Reverse Reverse Reverse Reverse Reverse Reverse Reverse Reverse Reverse Reverse Reverse PS0 PS1 PS2 MLB T11 PM T10 VDD VDD VDD VDD2 VDD2 VDD2 VM VM VM
40
3. ST7573 Pad Arrangement (COG)
For easy LCM design, the Power-1, Power-2 & Power-3 are identical (any one of them can be used).
Power-3 has VGI, VGS, V0O, V0I, V0S, XV0O, XV0I and XV0S which are not in Power-1 or Power-2.
2/46
47 55 50 118 57 64 68 V0O V0O V0S V0I V0I V0I V0I XV0I XV0I XV0I XV0I XV0S XV0O XV0O T1 T2 T3 T4 T0 T5 T6 T7 T8 74 116 114 113 82 SEG4 SEG3 SEG2 SEG1 SEG0 Reserve Reserve COMS1 COM16 COM17 COM18 87 89 96 T9 D7 D6 D5 D4 D3 D2 D1 D0 ERD RWR A0 CSB OSC RESB VRS VDD VDD VDD VDD VDD2 VDD2 VDD2 VDD2 COM29 COM30 COM31 97
VGI VGI VGI VGI VGS VGO VGO VSS VSS VSS
2007/07/12
ST7573
4. Pad Center Coordinates
PAD No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 PAD Name VDD2 VDD2 VDD VDD VDD DUMMY DUMMY DUMMY DUMMY DUMMY DUMMY Reserve Reserve Reserve Reserve Reserve Reserve Reserve Reserve Reserve Reserve Reserve Reserve PS0 PS1 PS2 MLB T11 PM T10 VDD VDD VDD VDD2 VDD2 VDD2 VM VM VM X -2899.00 -2839.00 -2779.00 -2719.00 -2659.00 -2574.50 -2514.50 -2454.50 -2394.50 -2334.50 -2274.50 -2190.00 -2130.00 -2070.00 -2010.00 -1950.00 -1890.00 -1830.00 -1770.00 -1710.00 -1650.00 -1590.00 -1530.00 -1470.00 -1410.00 -1350.00 -1290.00 -1230.00 -1170.00 -1110.00 -1050.00 -990.00 -930.00 -870.00 -810.00 -750.00 -690.00 -630.00 -570.00 -481.00 -421.00 -361.00 -301.00 -241.00 -181.00 Y -286.50 -286.50 -286.50 -286.50 -286.50 -286.50 -286.50 -286.50 -286.50 -286.50 -286.50 -286.50 -286.50 -286.50 -286.50 -286.50 -286.50 -286.50 -286.50 -286.50 -286.50 -286.50 -286.50 -286.50 -286.50 -286.50 -286.50 -286.50 -286.50 -286.50 -286.50 -286.50 -286.50 -286.50 -286.50 -286.50 -286.50 -286.50 -286.50 -286.50 -286.50 -286.50 -286.50 -286.50 -286.50 PAD No. 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 PAD Name VGO VSS VSS VSS V0O V0O V0S V0I V0I V0I V0I XV0I XV0I XV0I XV0I XV0S XV0O XV0O T1 T2 T3 T4 T0 T5 T6 T7 T8 T9 D7 D6 D5 D4 D3 D2 D1 D0 ERD RWR A0 CSB OSC RESB VRS VDD VDD X -121.00 -61.00 -1.00 59.00 129.00 189.00 249.00 309.00 369.00 429.00 489.00 549.00 609.00 669.00 729.00 789.00 849.00 909.00 969.00 1029.00 1089.00 1149.00 1209.00 1269.00 1329.00 1389.00 1449.00 1519.00 1579.00 1639.00 1699.00 1759.00 1819.00 1879.00 1939.