Document
NanoAmp Solutions, Inc. 670 North McCarthy Blvd. Suite 220, Milpitas, CA 95035 ph: 408-935-7777, FAX: 408-935-7770 www.nanoamp.com
N02M0818L2A
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2Mb Ultra-Low Power Asynchronous Medical CMOS SRAM
256Kx8 bit Overview
The N02M0818L2A is an integrated memory device intended for implanted life-support (Class 3) medical applications. This device comprises a 2 Mbit Static Random Access Memory organized as 262,144 words by 8 bits. The device is designed and fabricated using NanoAmp’s advanced CMOS technology with reliability inhancements for medical users. The base design is the same as NanoAmp’s N02M0818L1A, which is intended for non life-support (Class 1 and 2) medical applications. The device operates with two chip enable (CE1 and CE2) controls and output enable (OE) to allow for easy memory expansion. The N02M0818L2A is optimal for various applications where low-power is critical such as implanted pacemaker devices. The device can operate over a very wide temperature range of -20oC to +60oC and is available in die form as well as in JEDEC standard packages compatible with other standard 256Kb x 8 SRAMs
Features
• Single Wide Power Supply Range 1.3 to 2.3 Volts • Very low standby current 200nA typical at 2.1V and 37 deg C • Very low operating current 1 mA at 2.0V and 1µs (Typical) • Very low Page Mode operating current 0.5mA at 1.0V and 1µs (Typical) • Simple memory control Dual Chip Enables (CE1 and CE2) Output Enable (OE) for memory expansion • Low voltage data retention Vcc = 1.0V • Automatic power down to standby mode • TTL compatible three-state output driver
Product Family
Part Number N02M0818L2AN Package Type 32 - STSOP I Operating Temperature -20oC to +60oC Power Supply (Vcc) 1.3V - 2.3V Speed 100ns @ 1.65V 500ns @ 1.3V Standby Current (ISB) 450nA @ 2.3V Operating Current (Icc), Max 2.5 mA @ 1MHz
N02M0818L2AD Known Good Die
Pin Configuration
Pin Descriptions
Pin Name A0-A17 Pin Function Address Inputs Write Enable Input Chip Enable Input Output Enable Input Data Inputs/Outputs Power Ground
A11 A9 A8 A13 WE CE2 A15 Vcc A17 A16 A14 A12 A7 A6 A5 A4
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
N02M0818L2A STSOP
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
OE A10 CE1 I/O7 I/O6 I/O5 I/O4 I/O3 Vss I/O2 I/O1 I/O0 A0 A1 A2 A3
WE CE1, CE2 OE I/O0-I/O7 VCC VSS
(DOC#14-02-036 Rev C ECN#01-0887) The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
1
NanoAmp Solutions, Inc. Functional Block Diagram
N02M0818L2A
VCCQ(opt)
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Address Inputs A0 - A3
Word Address Decode Logic
Word Mux
Address Inputs A4 - A17
Page Address Decode Logic
16K Page x 16 word x 8 bit RAM
Input/ Output Mux and Buffers
I/O0 - I/O7
CE1 CE2 WE OE
Functional Description
CE1 H X L L L CE2 X L H H H WE X X L H H OE X X X2 L H
Control Logic
I/O0 - I/O7 High Z High Z Data In Data Out High Z
MODE Standby1 Standby1 Write2 Read Active
POWER Standby Standby Active.