MC74HCT132A

MC74HCT132A Quad 2-Input NAND Gate with Schmitt-Trigger Inputs with LSTTL Compatible Inputs High−Performance Silicon−Gate CMOS The MC74HCT132A is identical in pinout to the LS132. The device inputs are compatible with standard CMOS outputs; with pull−up resistors, they are compatible with LSTTL outputs. The MC74HCT132A can be used to enhance noise immunity or to square up slowly changing waveforms. Features Output Drive Capability: 10 LSTTL Loads Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 2.0 to 6.0 V Low Input Current: 1.0 mA High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements as Defined by JEDEC Standard No. 7A Chip Complexity: 72 FETs or 18 Equivalent Gates NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant A1 B1 Y1 A2 B2 Y2 GND 1 2 3 4 5 6 7 14 VCC 13 B4 12 A4 11 Y4 10 B3 9 A3 8 Y3 Figure 1. Pin Assignment www.onsemi.com 14 SOIC−14 D SUFFIX CASE 751A 1 MARKING DIAGRAMS HCT132AG AWLYWW TSSOP−14 DT SUFFIX CASE 948G 14 HCT 132A ALYWG G 1 A = Assembly Location WL, L = Wafer Lot Y = Year WW, W = Work Week G or G = Pb−Free Package (Note: Microdot may be in either location) FUNCTION TABLE Inputs AB LL LH HL HH Output Y H H H L ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions sec...