MC74HC365

MOTOROLA SEMICONDUCTOR TECHNICAL DATA www.DataSheet4U.com Hex 3-State Noninverting Buffer with Common Enables High–Performance Silicon–Gate CMOS The MC54/74HC365 is identical in pinout to the LS365. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This device is a high–speed hex buffer with 3–state outputs and two common active–low Output Enables. When either of the enables is high, the buffer outputs are placed into high–impedance states. The HC365 has noninverting outputs. Output Drive Capability: 15 LSTTL Loads Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 2 to 6 V Low Input Current: 1 µA High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard No. 7A Chip Complexity: 90 FETs or 22.5 Equivalent Gates MC54/74HC365 J SUFFIX CERAMIC PACKAGE CASE 620–10 1 16 16 1 N SUFFIX PLASTIC PACKAGE CASE 648–08 16 1 DT SUFFIX TSSOP PACKAGE CASE 948F–01 ORDERING INFORMATION MC54HCXXXJ MC74HCXXXN MC74HCXXXDT Ceramic Plastic TSSOP LOGIC DIAGRAM 2 4 6 10 12 14 3 5 7 9 11 13 A0 A1 A2 A3 A4 A5 1 OUTPUT ENABLE 1 15 OUTPUT ENABLE 2 Y0 Y1 Y2 Y3 Y4 Y5 PIN ASSIGNMENT OUTPUT ENABLE 1 A0 Y0 A1 Y1 A2 Y2 GND 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC OUTPUT ENABLE 2 A5 Y5 A4 Y4 A3 Y3 PIN 16 = VCC PIN 8 = GND FUNCTION TABLE Inputs Enable 1 L L H X Enable 2 L L X H A L H X X Output Y L H Z Z X = don’t care Z = high im...