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BU7985KVT

Rohm

56bit LVDS Receiver 8:56 DeSerializer

LVDS Interface ICs 56bit LVDS Receiver 8:56 Deserializer BU7985KVT No.12057EAT04 ●Description LVDS Interface IC of ROH...


Rohm

BU7985KVT

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Description
LVDS Interface ICs 56bit LVDS Receiver 8:56 Deserializer BU7985KVT No.12057EAT04 ●Description LVDS Interface IC of ROHM "Serializer" "Deserializer" operate from 8MHz to 150MHz wide clock range, and number of bits range is from 35 to 70. Data is transmitted seven times (7X) stream and reduce cable number by 3(1/3) or less. The ROHM's LVDS has low swing mode to be able to expect further low EMI. ●Features 1) Wide dot clock range: Single (112MHz)/Dual (180MHz) (NTSC, VGA, SVGA, WXGA UXGA) 2) Support clock frequency from 20MHz up to 112MHz. 3) User programmable LVCMOS data output triggering timing by using either rising or falling edge of clock. 4) User programmable LVCMOS data and clock output driving ability. 5) Support Fail-Safe Hi-z Operation. 6) 56bit LVDS transmitter is recommended to use BU7988KVT. ●Applications Flat Panel Display ●Precaution ■This chip is not designed to protect from radioactivity. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 1/20 2011.12 - Rev.A BU7985KVT ●Block Diagram LVDS Input RA1+/RB1+/- 1st Link RC1+/- RD1+/- RCLK1+/(20 to 112MHz) +++++- RA2+/RB2+/- 2nd Link RC2+/RD2+/- RCLK2+/(20 to 90MHz) R/F DRVSEL XRST ++- +++- SERIAL TO PARALLEL SERIAL TO PARALLEL 28 PLL 28 PLL MUX Technical Note LVCMOS Output 8 RED1 8 GREEN1 1st Data 8 BLUE1 HSYNC VSYNC DE RECEIVER CLOCK OUT (20 to 90MHz) D to D (10 to 56MHz) S to D 8 RED2 8 GREEN2 2nd Data 8 BLUE2 Fig.1 Block Diagram www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved...




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