MC9S12XF384

MC9S12XF512 Reference Manual S12X Microcontrollers Covers MC9S12XF512 MC9S12XF384 MC9S12XF256 MC9S12XF128 MC9S12XF512RMV1 Rev.1.20 10-Nov-2010 freescale.com To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to: http://freescale.com/ A full list of family members and options is included in the appendices. The following revision history table summarizes changes contained in this document. This document contains information for all constituent modules, with the exception of the S12 CPU. For S12 CPU information please refer to the CPU S12 Reference Manual. Revision History Date 06-Dec-2007 12-Dec-2007 08-Jan-2008 15-Jan-2008 05-Mar-2008 02-Oct-2008 01-Mar-2010 18-May-2010 10-Nov-2010 Revision Level 1.12 1.13 1.14 1.15 1.16 1.17 1.18 1.19 1.20 Description Updated memory map description for family parts (1.1.4 MC9S12XF512 - Address Mapping) Updated derivative differences w.r.t. DFlash size (D.1 Memory Sizes and Package Options S12XF Family) Add FTM BG (384K2/256K2) Remove table for Module Run Supply Currents (A-10) Remove 3.3V columns in Table A-27, 3.0V columns in Table A-28 Add FTM BG (128K2) Fixed typo in detailed register map (SPI1/SPI1DRH) Import updated BGs VREG, ECT, INT, DBG Fixed typo in Table 1-6 Updated ordering info for 112 LQFP Updated NVM timing parameter section for brownout case Speci...