ADCLK944

2.5 V/3.3 V, Four LVPECL Outputs, SiGe Clock Fanout Buffer ADCLK944 FEATURES Operating frequency: 7.0 GHz Broadband random jitter: 50 fs rms On-chip input terminations Power supply (VCC − VEE): 2.5 V to 3.3 V www.DataSheet4U.com FUNCTIONAL BLOCK DIAGRAM ADCLK944 LVPECL Q0 VREF Q0 REFERENCE Q1 VT CLK Q2 CLK Q3 Q3 08770-001 APPLICATIONS Low jitter clock distribution Clock and data signal restoration Level translation Wireless communications Wired communications Medical and industrial imaging ATE and high performance instrumentation Q1 Q2 Figure 1. GENERAL DESCRIPTION The ADCLK944 is an ultrafast clock fanout buffer fabricated on the Analog Devices, Inc., proprietary XFCB3 silicon germanium (SiGe) bipolar process. This device is designed for high speed applications requiring low jitter. The device has a differential input equipped with center-tapped, differential, 100 Ω on-chip termination resistors. The input can accept dc-coupled LVPECL, CML, 3.3 V CMOS (single-ended), and ac-coupled 1.8 V CMOS, LVDS, and LVPECL inputs. A VREF pin is available for biasing ac-coupled inputs. The ADCLK944 features four full-swing emitter-coupled logic (ECL) output drivers. For LVPECL (positive ECL) operation, bias VCC to the positive supply and VEE to ground. For ECL operation, bias VCC to ground and VEE to the negative supply. The ECL output stages are designed to directly drive 800 mV each side into 50 Ω terminated to VCC − 2 V for a total differential output swing of 1.6 V. The ADCLK94...