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SAA7144HL Dataheets PDF



Part Number SAA7144HL
Manufacturers NXP
Logo NXP
Description Quadruple video input processor
Datasheet SAA7144HL DatasheetSAA7144HL Datasheet (PDF)

SAA7144HL Quadruple video input processor Rev. 01 — 21 April 2005 www.DataSheet4U.com Product data sheet 1. General description The SAA7144HL is a combination of four stand alone multistandard video decoders. The SAA7144HL is a pure 3.3 V (5 V tolerant inputs and I/Os) CMOS circuit and a highly integrated circuit for video surveillance applications. All four video decoders are based on the principle of line-locked clock decoding and are able to decode the color of PAL, SECAM and NTSC signals .

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SAA7144HL Quadruple video input processor Rev. 01 — 21 April 2005 www.DataSheet4U.com Product data sheet 1. General description The SAA7144HL is a combination of four stand alone multistandard video decoders. The SAA7144HL is a pure 3.3 V (5 V tolerant inputs and I/Os) CMOS circuit and a highly integrated circuit for video surveillance applications. All four video decoders are based on the principle of line-locked clock decoding and are able to decode the color of PAL, SECAM and NTSC signals into “CCIR 601” compatible color component values. The SAA7144HL accepts as analog inputs in total eight CVBS sources from TV or VTR (two selectable CVBS sources for each of the four decoders). Each of the four video decoders (A, B, C, D) contains an analog preprocessing circuit including source selection for two CVBS sources, anti-aliasing filter and Analog-to-Digital Converter (ADC), an automatic clamp and gain control, a Clock Generation Circuit (CGC), a digital multistandard decoder (PAL, NTSC and SECAM), a Brightness Contrast Saturation (BCS) control circuit, a multistandard text slicer see Figure 1 and a 27 MHz VBI data bypass. The integrated high performance multistandard data slicer supports several VBI data standards: • Teletext [WST (World Standard Teletext), CCST (Chinese teletext)] (625 lines) • Teletext [US-WST, NABTS (North American Broadcast Text System) and MOJI (Japanese teletext)] (525 lines) • • • • • Closed caption [Europe, US (line 21)] Wide Screen Signalling (WSS) Video Programming Signal (VPS) Time codes (VITC EBU/SMPTE) HIGH-speed VBI data bypass for Intercast™ application. The circuit is I2C-bus controlled via two I2C-bus interfaces where two video decoders share one I2C-bus interface on different I2C-bus slave addresses. Each of the four video decoders of the SAA7144HL uses a register mapping which is compatible to the SAA7113H register mapping. Philips Semiconductors SAA7144HL www.DataSheet4U.com Quadruple video input processor 2. Features 2.1 General s Four stand alone video decoder instances (A, B, C, D) with two selectable CVBS video inputs each and digital video outputs s Programming register mapping identical to SAA7113H s Small package (LQFP128) s Requires only one crystal (24.576 MHz) for all standards shared by all video decoder instances s CMOS 3.3 V device with 5 V tolerant digital inputs and I/O ports s All four decoder instances are I2C-bus controlled. Two decoder instances share one I2C-bus interface (full read-back ability by an external controller, bit rate up to 400 kbit/s). 2.2 Features of each of the four video decoder instances A, B, C and D s Two analog CVBS inputs with internal analog source selectors s One analog preprocessing channel in differential CMOS style with built-in analog anti-aliasing filter s Fully programmable static gain or automatic gain control for the selected CVBS channel s Switchable white peak control s Line-locked system clock frequencies s Digital PLL for horizontal sync process.


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