Document
R1EX24008ASAS0A R1EX24008ATAS0A
Two-wire serial interface 8k EEPROM (1024-word × 8-bit)
REJ03C0352-0100 Rev.1.00 Apr. 21, 2008
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Description
R1EX24xxx series are two-wire serial interface EEPROM (Electrically Erasable and Programmable ROM). They realize high speed, low power consumption and a high level of reliability by employing advanced MNOS memory technology and CMOS process and low voltage circuitry technology. They also have a 16-byte page programming function to make their write operation faster. Note: Renesas Technology’s serial EEPROM are authorized for using consumer applications such as cellular phone, camcorders, audio equipment. Therefore, please contact Renesas Technology’s sales office before using industrial applications such as automotive systems, embedded controllers, and meters.
Features
• • • • Single supply: 1.8 V to 5.5 V Two-wire serial interface (I2C serial bus) Clock frequency: 400 kHz Power dissipation: Standby: 2 µA (max) Active (Read): 1 mA (max) Active (Write): 3.0 mA (max) Automatic page write: 16-byte/page Write cycle time: 5 ms Endurance: 106 Cycles Data retention: 10 Years
• • • •
REJ03C0352-0100 Rev.1.00 Apr. 21, 2008 Page 1 of 22
R1EX24008AxxS0A • Small size packages: SOP-8pin, TSSOP-8pin • Shipping tape and reel TSSOP 8-pin: 3,000 IC/reel SOP 8-pin: 2,500 IC/reel • Temperature range: −40 to +85°C • Lead free products.
Ordering Information
Type No.
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Internal organization 8k bit (1024 × 8-bit)
Operating voltage Frequency 1.8 V to 5.5 V 400 kHz
Package 150 mil 8-pin plastic SOP PRSP0008DF-B (FP-8DBV) Lead free 8-pin plastic TSSOP PTSP0008JC-B (TTP-8DAV) Lead free
R1EX24008ASAS0A
R1EX24008ATAS0A
8k bit (1024 × 8-bit)
1.8 V to 5.5 V
400 kHz
Pin Arrangement
8-pin SOP /8-pin TSSOP
A0 A1 A2 VSS
1 2 3 4
8 7 6 5 (Top view)
VCC WP SCL SDA
REJ03C0352-0100 Rev.1.00 Apr. 21, 2008 Page 2 of 22
R1EX24008AxxS0A
Pin Description
Pin name A0 to A2 SCL SDA WP VCC VSS NC
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Function Device address Serial clock input Serial data input/output Write protect Power supply Ground No connection
Block Diagram
VCC VSS
High voltage generator
Address generator
X decoder
Memory array
WP A0, A1, A2 SCL SDA
Control logic
Y decoder
Y-select & Sense amp.
Serial-parallel converter
Absolute Maximum Ratings
Parameter Supply voltage relative to VSS Input voltage relative to VSS Operating temperature range*1 Storage temperature range Symbol VCC Vin Topr Tstg Value −0.6 to +7.0 −0.5* to +7.0*
2 3
Unit V V °C °C
−40 to +85 −55 to +125
Notes: 1. Including electrical characteristics and data retention. 2. Vin (min): −3.0 V for pulse width ≤ 50 ns. 3. Should not exceed VCC + 1.0 V.
REJ03C0352-0100 Rev.1.00 Apr. 21, 2008 Page 3 of 22
R1EX24008AxxS0A
DC Operating Conditions
Parameter Supply voltage Input high voltage Input low voltage Operating temperature Symbol VCC VSS VIH VIL Topr Min 1.8 0 VCC × 0.7 −0.3*1 −40 Typ 0 Max 5.5 0 VCC + 0.5 VCC × 0.3 +85 Unit V V V V °C
Notes: 1. VIL (min): −1.0 V for pulse width ≤ 50 ns.
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DC Characteristics (Ta = −40 to +85°C, VCC = 1.8 V to 5.5 V)
Parameter Input leakage current Output leakage current Standby VCC current Read VCC current Write VCC current Output low voltage Symbol Min ILI ILO ISB ICC1 ICC2 VOL2 VOL1 Typ 1.0 Max 2.0 2.0 2.0 1.0 3.0 0.4 0.2 Unit µA µA µA mA mA V V Test conditions VCC = 5.5 V, Vin = 0 to 5.5 V VCC = 5.5 V, Vout = 0 to 5.5 V Vin = VSS or VCC VCC = 5.5 V, Read at 400 kHz VCC = 5.5 V, Write at 400 kHz VCC = 2.7 to 5.5 V, IOL = 3.0 mA VCC = 1.8 to 2.7 V, IOL = 1.5 mA
Capacitance (Ta = +25°C, f = 1 MHz)
Parameter Symbol
1
Min
Typ
Max 6.0 6.0
Unit pF pF
Test conditions Vin = 0 V Vout = 0 V
Input capacitance (A0 to A2, SCL, WP) Cin*1 Output capacitance (SDA) Note: CI/O*
1. This parameter is sampled and not 100% tested.
REJ03C0352-0100 Rev.1.00 Apr. 21, 2008 Page 4 of 22
R1EX24008AxxS0A
AC Characteristics (Ta = −40 to +85°C, VCC = 1.8 to 5.5 V)
Test Conditions • Input pules levels: VIL = 0.2 × VCC VIH = 0.8 × VCC • Input rise and fall time: ≤ 20 ns • Input and output timing reference levels: 0.5 × VCC • Output load: TTL Gate + 100 pF
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Parameter
Symbol fSCL tLOW tHIGH tI tAA tBUF tHD.STA tSU.STA tHD.DAT tSU.DAT tR tF tSU.STO tDH tHD.WP tSU.WP tWC
Min 1200 600 100 1200 600 600 0 100 600 50 1200 0
Typ 10
6
Max 400 50 900 300 300 5
Unit kHz ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ms cycles
Notes
Clock frequency Clock pulse width low Clock pulse width high Noise suppression time Access time Bus free time for next mode Start hold time Start setup time Data in hold time Data in setup time Input rise time Input fall time Stop setup time Data out hold time Write protect hold time Write protect setup time Write cycle time Erase/Write Endurance
1
1 1
2 3
Notes: 1. This parameter is sampl.