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NCP5383 2 Phase Buck Controller with Integrated Gate Drivers and AVP
The NCP5383 is a two phase buck controller used in low voltage, high current power supplies. Dual-edge pulse-width modulation (PWM) combined with inductor current sensing and adaptive voltage positioning (AVP) reduces system cost by providing the fastest initial response to transient loads thereby requiring less bulk and ceramic output capacitors to satisfy transient load-line requirements. A high performance operational error amplifier is provided, which allows for easy compensation of the system. Protection features include overcurrent protection, undervoltage lockout (UVLO), www.DataSheet4U.com thermal shutdown and power good monitor.
Features http://onsemi.com MARKING DIAGRAM
1 24 PIN QFN, 4x4 MN SUFFIX CASE 485L 5383 ALYWG G
•ăDual-edge PWM for Fastest Initial Response to Transient Loading •ăHigh Performance Operational Error Amplifier •ă1% Internal Reference Voltage Accuracy •ăPhase-to-Phase Current Balancing •ă“Lossless” Differential Inductor Current Sensing •ăDifferential Current Sense Amplifiers for Each Phase •ăAdaptive Voltage Positioning (AVP) •ăFrequency Range: 100 kHz – 400 kHz Set by the Resistor •ăPower Good Output with Internal Delays •ăProgrammable Soft Start Time •ăIntegrated Gate Drivers •ăThis is a Pb-Free Device
Applications
5383 A L Y W G
= Specific Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Package
(Note: Microdot may be in either location)
PIN CONNECTIONS
PG BST1 TG1 SWN1 PGND1 BG1 ROSC ILIM VCC AGND SS COMP VFB VDRP CS1 CSN CS2 EN (Top View) VCCP BG2 PGND2 SWN2 TG2 BST2
•ăPentium IV Processors •ăGraphics Cards •ăLow Voltage, High Current Power Supplies
ORDERING INFORMATION
Device NCP5383MNR2G Package Shipping†
QFN-24 4000 / Tape & Reel (Pb-Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D.
©Ă Semiconductor Components Industries, LLC, 2007
1
December, 2007 - Rev. 3
Publication Order Number: NCP5383/D
NCP5383
SS Vcore
2
FAULT SS 23 BST1
OVP (125% of VFB) UVP (75% of VFB) FB 7 PG +
22
TG1
Gate Driver I
21 18
SWN1 VCCP
AGND 4 6 COMP www.DataSheet4U.com VDRP 8
0.8 V 19 Droop Amplifier + 0.8 V 20
BG1
PGND1
CS1 CSN CS2
9 10
+ -
+ -
13
BST2
14 11 + + 15 Gate Driver II VCCP 17
TG2
SWN2
ROSC
1
OSCILLATOR
BG2
ILIM
2
+ Fault Logic + UVLO
16 24
PGND2 PG
EN VCC
12 3 +
9V
Figure 1. Simplified Block Diagram
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2
NCP5383
VCC NCP5383 ROSC ILIM PG SS VCC VCCP BST1 3 18 23 12 V VCCP 1 2 24 5 5V
TG1 SWN1
22 21
Vcore
BG1
19
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PGND1
20 VCCP VCC
7
VFB
BST2
13 14 15 Vcore
TG2 SWN2
6 8 9 10
COMP VDRP CS1
BG2
17
PGND2 CSN EN 11 CS2 AGND
16 12
4
Figure 2. Typical Application Schematic
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NCP5383
PIN DESCRIPTIONS
Pin No. 1 Symbol ROSC Description A resistance from this pin to ground programs the oscillator frequency according to fSW = 1 / (ROSC w 100ĂpF). Also, this pin supplies a trimmed output voltage of 2.00 V so it may be used to form a voltage divider at the ILIM pin to set the over current shutdown threshold as shown in the Applications Schematics. Over current shutdown threshold. To program the shutdown threshold, connect this pin to the ROSC pin via a resistor divider as shown in the Applications Schematics. To disable the over current feature connect this pin directly to the ROSC pin. To guarantee correct operation, this pin should only be connected to the voltage generated by the ROSC pin – do not connect this pin to any externally generated voltages. Power for the internal control circuits. Power supply return for the analog circuits that control output voltage. A capacitor from this pin to ground programs the soft-start time. Output of the error amplifier and input to the inverting pin of the PWM comparators. Voltage feedback pin and error amplifier inverting input. Connect a resistor from this pin to VCORE. The value of this resistor and the amount of current from the droop resistor (RDRP) will set the amount of output voltage droop (AVP) during load. Current signal output for Adaptive Voltage Positioning (AVP). The offset of this pin above the no-load set-point is proportional to the output current. Connect a resistor from this pin to VFB to set the amount of AVP current into the feedback resistor (RFB) that will result in output voltage droop. Leave this pin open for no AVP. Non-inverting input to current sense amplifier #x, x = 1, 2 Inverting input to current sense amplifier #x, x = 1 (Tie to VCORE) When this pin is pulled High the controller is enabled. When it is pulled Low the controller will be disabled. Either an open-collector output (with a pull-up resistor) or a logic gate (CMOS or totem-pole output) may be used to drive this pin. A Low to High transition on this pin will induce soft start. If the Enable function is not required, this pin shou.