H55S2562JFR-A3M

www.DataSheet4U.com 256MBit MOBILE SDR SDRAM based on 4M x 4Bank x16 I/O Specification of 256M (16Mx16bit) Mobile SDRAM Memory Cell Array - Organized as 4banks of 4,194,304 x16 This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev 1.1 / July. 2009 1 11 www.DataSheet4U.com 256Mbit (16Mx16bit) Mobile SDR H55S2562JFR Series Document Title 4Bank x 4M x 16bits Synchronous DRAM Revision History Revision No. 0.1 0.2 1.0 1.1 Initial Draft IDD Specification updated The final version Omit a typo in package information History Draft Date May 2008 May 2008 Nov. 2008 July. 2009 Remark Preliminary Preliminary Rev 1.1 / July. 2009 2 11 www.DataSheet4U.com 256Mbit (16Mx16bit) Mobile SDR H55S2562JFR Series DESCRIPTION The Hynix H55S2562JFR is suited for non-PC application which use the batteries such as PDAs, 2.5G and 3G cellular phones with internet access and multimedia capabilities, mini-notebook, hand-held PCs. The Hynix 256M Mobile SDRAM is 268,435,456-bit CMOS Mobile Synchronous DRAM(Mobile SDR), ideally suited for the main memory applications which requires large memory density and high bandwidth. It is organized as 4banks of 4,194,304x16. Mobile SDRAM is a type of DRAM which operates in synchronization with input clock. The Hynix Mobile SDRAM latch each control signal at the rising edge of a basic input clock (CLK) and input/output da...