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H55S1G62MFP-75 Dataheets PDF



Part Number H55S1G62MFP-75
Manufacturers Hynix Semiconductor
Logo Hynix Semiconductor
Description 1Gb (64Mx16bit) Mobile SDRAM
Datasheet H55S1G62MFP-75 DatasheetH55S1G62MFP-75 Datasheet (PDF)

www.DataSheet4U.com 1GBit MOBILE SDR SDRAMs based on 16M x 4Bank x16I/O Specification of 1Gb (64Mx16bit) Mobile SDRAM Memory Cell Array - Organized as 4banks of 16,777,216 x16 This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev 1.2 / Jul. 2008 1 www.DataSheet4U.com 1Gbit (64Mx16bit) Mobile SDR Memory H55S1G62MFP Series Document Title 4Bank x 16M x .

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www.DataSheet4U.com 1GBit MOBILE SDR SDRAMs based on 16M x 4Bank x16I/O Specification of 1Gb (64Mx16bit) Mobile SDRAM Memory Cell Array - Organized as 4banks of 16,777,216 x16 This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev 1.2 / Jul. 2008 1 www.DataSheet4U.com 1Gbit (64Mx16bit) Mobile SDR Memory H55S1G62MFP Series Document Title 4Bank x 16M x 16bit Synchronous DRAM 11 Revision History Revision No. 0.1 0.2 1.0 1.1 1.2 Initial Draft Modify : IDD5 : 100mA --> 120mA IDD6 (@45oC, Full Bank) : 450uA --> 500uA Final Version Modify : tRAS ( MHz/133Mhz: 42ns/45ns) History Draft Date Sep. 2007 Jan. 2008 Mar. 2008 Jun. 2008 Jul. 2008 Remark Preliminary Preliminary Modify some timing diagram Rev 1.2 / Jul. 2008 2 www.DataSheet4U.com 1Gbit (64Mx16bit) Mobile SDR Memory H55S1G62MFP Series DESCRIPTION The Hynix H55S1G62MFP series is suited for non-PC application which use the batteries such as PDAs, 2.5G and 3G cellular phones with internet access and multimedia capabilities, mini-notebook, handheld PCs. The Hynix 1G Mobile SDRAM is 1,073,741,824-bit CMOS Mobile Synchronous DRAM(Mobile SDR), ideally suited for the main memory applications which requires large memory density and high bandwidth. It is organized as 4banks of 16,777,216x16. Mobile SDRAM is a type of DRAM which operates in synchronization with input clock. The Hynix Mobile SDRAM latch each control signal at the rising edge of a basic input clock (CLK) and input/output data in synchronization with the input clock (CLK). The address lines are multiplexed with the Data Input/ Output signals on a multiplexed x16 Input/ Output bus. All the commands are latched in synchronization with the rising edge of CLK. The Mobile SDRAMs provides for programmable read or write Burst length of Programmable burst lengths: 1, 2, 4, 8 locations or full page. An AUTO PRECHARGE function may be enabled to provide a self-timed row precharge that is initiated at the end of the burst access. The Mobile SDRAM uses an internal pipelined architecture to achieve high-speed operation. This architecture is compartible with the 2n rule of prefetch architectures, but it also allows the column address to be changed on every clock cycle to achieve a high-speed, fully random access. Precharging one bank while accessing one of the other three banks will hide the precharge cycles and provide seamless, high-speed, randonaccess operation. Read and write accesses to the Hynix Mobile SDRAMs are burst oriented; accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration of an ACTIVE command, which is then followed by a READ or WRITE command. The address bits registered coincident with the ACTIVE command are used to select the bank and the row to be accessed. The address bits registered coincident with the READ or WRITE command are used to select the bank and the starting column location for the burst access. A burst of Read or Write cycles in progress can be terminated by a burst terminate command or can be interrupted and replaced by a new burst Read or Write command on any cycle(This pipelined design is not restricted by a 2N rule). The Hynix Mobile SDR also provides for special programmable options including Partial Array Self Refresh of full array, half array, quarter array Temperature Compensated Self Refresh of 45 or 85 degrees oC. The Hynix Mobile SDR has the special Low Power function of Auto TCSR(Temperature Compensated Self Refresh) to reduce self refresh current consumption. Since an internal temperature sensor is implanted, it enables to automatically adjust refresh rate according to temperature without external EMRS command. Deep Power Down Mode is a additional operating mode for Mobile SDR. This mode can achieve maximum power reduction by removing power to the memory array within each Mobile SDR. By using this feature, the system can cut off alomost all DRAM power without adding the cost of a power switch and giving up mother-board power-line layout flexibility. All inputs are LV-CMOS compatible. Devices will have a VDD and VDDQ supply of 1.8V (nominal). 11 Rev 1.2 / Jul. 2008 3 www.DataSheet4U.com 1Gbit (64Mx16bit) Mobile SDR Memory H55S1G62MFP Series INFORMATION for Hynix KNOWN GOOD DIE With the advent of Mullti-Chip package (MCPs), Package on Package (PoP) and system in a package (SiP) applications, customer demand for Known Good Die (KGD) has increased. Requirements for smaller form factors and higher memory densities are fueling the need for Wafer-level memory solutions due to their superior flexibility. Hynix Known Good Die (KGD) products can be used in packaging technologies such as systems-in-a-package (SIPs) and multi-chip packages (MCPs) to reduce the board area required, making them ideal for handheld PCs, and many other portab.


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