H55S1222EFP-A3E

www.DataSheet4U.com 128MBit MOBILE SDR SDRAMs based on 1M x 4Bank x32 I/O Specification of 128M (4Mx32bit) Mobile SDRAM Memory Cell Array - Organized as 4banks of 1,048,576 x32 This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev 1.0 / Jun. 2008 1 www.DataSheet4U.com 1128Mbit (4Mx32bit) Mobile SDR Memory H55S1222EFP Series Document Title 4Bank x 1M x 32bits Synchronous DRAM Revision History Revision No. 0.1 0.2 Initial Draft - Define IDD specification -. Correct Temp range(p.9) -. Modify IDD Values(p.11 & p.12) History Draft Date Sep. 2007 Feb. 2008 Remark Preliminary Preliminary 1.0 Jun. 2008 Rev 1.0 / Jun. 2008 2 www.DataSheet4U.com 1128Mbit (4Mx32bit) Mobile SDR Memory H55S1222EFP Series DESCRIPTION The Hynix H55S1222EFP is suited for non-PC application which use the batteries such as PDAs, 2.5G and 3G cellular phones with internet access and multimedia capabilities, mini-notebook, handheld PCs. The Hynix 128M Mobile SDRAM is 134,217,728-bit CMOS Mobile Synchronous DRAM(Mobile SDR), ideally suited for the main memory applications which requires large memory density and high bandwidth. It is organized as 4banks of 1,048,576x32. Mobile SDRAM is a type of DRAM which operates in synchronization with input clock. The Hynix Mobile SDRAM latch each control signal at the rising edge of a basic input clock (CLK) and input/outp...