IDT23S09E

IDT23S09E 3.3V ZERO DELAY CLOCK BUFFER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES www.DataSheet4U.com 3.3V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM COMPATIBLE FEATURES: DESCRIPTION: IDT23S09E Phase-Lock Loop Clock Distribution 10MHz to 200MHz operating frequency Distributes one clock input to one bank of five and one bank of four outputs Separate output enable for each output bank Output Skew < 250ps Low jitter <200 ps cycle-to-cycle IDT23S09E-1 for Standard Drive IDT23S09E-1H for High Drive No external RC network required Operates at 3.3V VDD Spread spectrum compatible Available in SOIC and TSSOP packages The IDT23S09E is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 200MHz. The IDT23S09E is a 16-pin version of the IDT23S05E. The IDT23S09E accepts one reference input, and drives two banks of four low skew clocks. The -1H version of this device operates up to 200MHz frequency and has higher drive than the -1 device. All parts have on-chip PLLs which lock to an input clock on the REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT pad. In the absence of an input clock, the IDT23S09E enters power down. In this mode, the device will draw less than 12µA for Commercial Temperature range and less than 25µA for Industrial temperature range...