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SCAN90004 Dataheets PDF



Part Number SCAN90004
Manufacturers National Semiconductor
Logo National Semiconductor
Description 4-Channel LVDS Buffer/Repeater
Datasheet SCAN90004 DatasheetSCAN90004 Datasheet (PDF)

November 2005 www.DataSheet4U.com SCAN90004 4-Channel LVDS Buffer/Repeater with Pre-Emphasis and IEEE 1149.6 SCAN90004 4-Channel LVDS Buffer/Repeater with Pre-Emphasis and IEEE 1149.6 General Description The SCAN90004 is a four channel 1.5 Gbps LVDS buffer/ repeater. High speed data paths and flow-through pinout minimize internal device jitter and simplify board layout, while configurable pre-emphasis overcomes ISI jitter effects from lossy backplanes and cables. The differential inputs interf.

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November 2005 www.DataSheet4U.com SCAN90004 4-Channel LVDS Buffer/Repeater with Pre-Emphasis and IEEE 1149.6 SCAN90004 4-Channel LVDS Buffer/Repeater with Pre-Emphasis and IEEE 1149.6 General Description The SCAN90004 is a four channel 1.5 Gbps LVDS buffer/ repeater. High speed data paths and flow-through pinout minimize internal device jitter and simplify board layout, while configurable pre-emphasis overcomes ISI jitter effects from lossy backplanes and cables. The differential inputs interface to LVDS, and Bus LVDS signals such as those on National’s 10-, 16-, and 18- bit Bus LVDS SerDes, as well as CML and LVPECL. The differential inputs and outputs are internally terminated with a 100Ω resistor to improve performance and minimize board space. The repeater function is especially useful for boosting signals for longer distance transmission over lossy cables and backplanes. Integrated IEEE 1149.1 (JTAG) and 1149.6 circuitry supports testability of both single-ended LVTTL/CMOS and highspeed differential LVDS interconnects. The 3.3V supply, CMOS process, and LVDS I/O ensure stable high performance at low power over the entire industrial -40 to +85˚C temperature range. Features n 1.5 Gbps data rate per channel n Configurable pre-emphasis drives lossy backplanes and cables n Low output skew and jitter n Hot plug protection n LVDS/CML/LVPECL compatible input, LVDS output n On-chip 100Ω input and output termination n 15 kV ESD protection on LVDS inputs and outputs n IEEE 1149.1 and 1149.6 compliant n Fault Insertion n Single 3.3V supply n Very low power consumption n Industrial -40 to +85˚C temperature range n Small TQFP Package Footprint n Evaluation Kit Available n See DS90LV004 for non-JTAG version 20113002 Pinout - Top View 20113001 SCAN90004 Block Diagram © 2005 National Semiconductor Corporation DS201130 www.national.com SCAN90004 Pin Descriptions Pin Name IN0+ IN0− IN1+ IN1− IN2+ IN2− IN3+ IN3− OUT0+ OUT0− OUT1+ OUT1− OUT2+ OUT2− OUT3+ OUT3PWDN PEM0 PEM1 TDI TDO TMS TCK TRST POWER VDD GND 3, 4, 5, 7, 10, 11, 28, 29, 32, 33 8, 9, 17, 18, 23, 24, 37, 38, 43, 44 6, 30, 31, 36 I, Power I, Power VDD = 3.3V, ± 5% Ground TQFP Pin Number 13 14 15 16 19 20 21 22 48 47 46 45 42 41 40 39 12 1 2 34 35 27 26 25 I/O, Type Description www.DataSheet4U.com DIFFERENTIAL INPUTS I, LVDS I, LVDS I, LVDS I, LVDS Channel 0 inverting and non-inverting differential inputs. Channel 1 inverting and non-inverting differential inputs. Channel 2 inverting and non-inverting differential inputs. Channel 3 inverting and non-inverting differential inputs. DIFFERENTIAL OUTPUTS O, LVDS O, LVDS O, LVDS O, LVDS Channel 0 inverting and non-inverting differential outputs. (Note 1) Channel 1 inverting and non-inverting differential outputs. (Note 1) Channel 2 inverting and non-inverting differential outputs. (Note 1) Channel 3 inverting and non-inverting differential outputs. (Note 1) DIGITAL CONTROL INTERFACE I, LVTTL I, LVTTL I, LVTTL O, LVTTL I, LVTTL I, LVTTL I, LVTTL A logic low at PWDN activates the hardware power down mode. Pre-emphasis Control Inputs (affects all Channels) Test Data Input to support IEEE 1149.1 features Test Data Output to support IEEE 1149.1 features Test Mode Select to support IEEE 1149.1 features Test Clock to support IEEE 1149.1 features Test Reset to support IEEE 1149.1 features N/C No Connect Note 1: The LVDS outputs do not support a multidrop (BLVDS) environment. The LVDS output characteristics of the SCAN90004 device have been optimized for point-to-point backplane and cable applications. www.national.com 2 SCAN90004 Absolute Maximum Ratings (Note 2) Supply Voltage (VDD) CMOS Input Voltage LVDS Receiver Input Voltage LVDS Driver Output Voltage LVDS Output Short Circuit Current Junction Temperature Storage Temperature Lead Temperature (Solder, 4sec) Max Pkg Power Capacity @ 25˚C Thermal Resistance (θJA) Package Derating above +25˚C ESD Last Passing Voltage HBM, 1.5kΩ, 100pF −0.3V to +4.0V -0.3V to (VDD+0.3V) -0.3V to (VDD+0.3V) -0.3V to (VDD+0.3V) +40 mA +150˚C −65˚C to +150˚C 260˚C 1.64W 76˚C/W 13.2mW/˚C 15kV EIAJ, 0Ω, 200pF 250V www.DataSheet4U.com Recommended Operating Conditions Supply Voltage (VCC) Input Voltage (VI) (Note 3) Output Voltage (VO) Operating Temperature (TA) Industrial −40˚C to +85˚C 3.15V to 3.45V 0V to VCC 0V to VCC Note 2: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. National does not recommend operation of products outside of recommended operation conditions. Note 3: VID max < 2.4V Electrical Characteristics Over recommended operating supply and temperature ranges unless other specified. Symbol Parameter Conditions Min Typ (Note 4) Max Units LVTTL DC SPECIFICATIONS (PWDN, PEM0, PEM1, TDI, TDO, TCK, TMS, TRST) VIH VIL IIH IIL IILR CIN1 COUT1 VCL .


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