EBE51FD8AHFE

PRELIMINARY DATA SHEET www.DataSheet4U.com 512MB Fully Buffered DIMM EBE51FD8AHFT EBE51FD8AHFE EBE51FD8AHFL Specifications Density: 512MB Organization  64M words × 72 bits, 1 rank Mounting 9 pieces of 512M bits DDR2 SDRAM sealed in FBGA Package  240-pin fully buffered, socket type dual in line memory module (FB-DIMM) PCB height: 30.35mm Lead pitch: 1.00mm  Advanced Memory Buffer (AMB): 655-ball FCBGA  Lead-free (RoHS compliant) Power supply  DDR2 SDRAM: VDD = 1.8V ± 0.1V  AMB: VCC = 1.5V + 0.075V/−0.045 Data rate: 667Mbps/533Mbps (max.) Four internal banks for concurrent operation (components) Interface: SSTL_18 Burst lengths (BL): 4, 8 /CAS Latency (CL): 3, 4, 5 Precharge: auto precharge option for each burst access Refresh: auto-refresh, self-refresh Refresh cycles: 8192 cycles/64ms  Average refresh period 7.8µs at 0°C ≤ TC ≤ +85°C 3.9µs at +85°C < TC ≤ +95°C Operating case temperature range  TC = 0°C to +95°C Features JEDEC standard Raw Card A Design Industry Standard Advanced Memory Buffer (AMB) High-speed differential point-to-point link interface at 1.5V (JEDEC draft spec)  14 north-bound (NB) high speed serial lanes  10 south-bound (SB) high speed serial lanes Various features/modes:  MemBIST and IBIST test functions  Transparent mode and direct access mode for DRAM testing  Interface for a thermal sensor and status indicator Channel error detection and reporting Automatic DDR2 SDRAM bus and channel calibration ...