IDT5T93GL06

IDT5T93GL06 2.5V LVDS 1:6 GLITCHLESS CLOCK BUFFER TERABUFFER II INDUSTRIAL TEMPERATURE RANGE www.DataSheet4U.com 2.5V LVDS 1:6 GLITCHLESS CLOCK BUFFER TERABUFFER™ II FEATURES: IDT5T93GL06 DESCRIPTION: Guaranteed Low Skew < 25ps (max) Very low duty cycle distortion < 100ps (max) High speed propagation delay < 2ns (max) Up to 800MHz operation Glitchless input clock switching up to 650MHz Selectable inputs Hot insertable and over-voltage tolerant inputs 3.3V / 2.5V LVTTL, HSTL, eHSTL, LVEPECL (2.5V), LVPECL (3.3V), CML, or LVDS input interface Selectable differential inputs to six LVDS outputs Power-down mode 2.5V VDD Available in VFQFPN package APPLICATIONS: Clock distribution The IDT5T93GL06 2.5V differential clock buffer is a user-selectable differential input to six LVDS outputs . The fanout from a differential input to six LVDS outputs reduces loading on the preceding driver and provides an efficient clock distribution network. The IDT5T93GL06 can act as a translator from a differential HSTL, eHSTL, LVEPECL (2.5V), LVPECL (3.3V), CML, or LVDS input to LVDS outputs. A single-ended 3.3V / 2.5V LVTTL input can also be used to translate to LVDS outputs. The redundant input capability allows for a glitchless change-over from a primary clock source to a secondary clock source up to 650MHz. Selectable inputs are controlled by SEL. During the switchover, the output will disable low for up to three clock cycles of the previously-selected input clock....