Document
Ordering number :EN5761
CMOS IC
LC74201JE
Single Chip MPEG Decoder
Overview
The LC74201JE is a CMOS IC that integrates the signal processing functions required of a video CD decoder to a single chip. All that it takes to make a version 1 or version 2 video CD player is the addition of a CD digital signal processor, DRAM, an audio D/A converter, digital video encoder, and similar components.
Package Dimensions
unit: mm 3182-QFP-128E
[LC74201JE]
Features
• Incorporation of virtually almost all the functionality required by a video CD player from the CD-ROM decoder through to the MPEG audio and video decoders in a single chip • Fully automatic playback with automatic decoding within the LSI in response to simple external commands and the MPEG bit stream • Special playback functions are activated by command inputs, and do not require signal processing by the host microcontroller • Support for two external DRAM configurations: 4 M bits (256k × 16 bits) or 4 M bits (256k × 16 bits) + 1 M bit (64k × 16 bits) • Support for a Track 1 DRAM user area (i.e., sector buffer) of up to 8 k bytes (4 M bits of external DRAM) or 22 k bytes (4 M +1 M bits of external DRAM) • Automatic synchronization of audio and video • Built-in high-speed decoder core that supports variablespeed video playback at up to quadruple speed. Audio support for normal and double-speed playback. • Internal registers that offer configuration settings for connecting to most commercially available CD digital signal processors and D/A converters • Compatible with version 2 of the video CD standard. Support for superimposition of closed caption data on the output signal as specified in the EIA608 standard • Support for Photo CD standard. (Base/4 and Base/16)
SANYO: QIP-128E
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
31698HA (OT) No. 5761-1/21
LC74201JE Pin Assignment
A09102
No. 5761-2/21
LC74201JE Pin Function Power Supply, Test Pin, Unconnected Pins
Pin No. 17 39 60 75 81 124 20 37 54 69 76 105 DVSS1 – – System power supply (connect to ground) DVDD1 – – System power supply (4-V power supply: 3.7 to 4.0 V) Symbol I/O Logic Function
29 114
DVDD2
–
–
Power supply for 5-V I/O pins (5-V power supply: 5.0 ±0.5 V)
33 112
DVSS2
–
–
Power supply for 5-V I/O pins (connect to ground)
65 67 125 127
AVSS AVDD CLKO TEST
– – Out In
– – Positive Positive
Power supply for VCO and PLL (connect to ground) Power supply for VCO and PLL (4-V power supply: 3.7 to 4.0 V) Clock output for VCO and PLL at test Test mode control pin (normally kept at low level) Unconnected pins below must be connected to GND or left open 34, 36, 40, 42, 53, 57, 64, 82, 83, 84 pins 85, 86, 97, 98, 108, 110, 126, 128 pins
NC
–
–
No. 5761-3/21
LC74201JE Clock Pins
Pin No. 18 Symbol FSCO I/O Out Logic Positive Function Subcarrier clock output (frequency = 1/4 pixel clock frequency). Tristate output using DVDD2 (5-V).