MAX3624A

19-5005; Rev 0; 10/09 KIT ATION EVALU E L B A IL AVA www.DataSheet4U.com Low-Jitter, Precision Clock Generator with Four Outputs General Description Features ♦ Crystal Oscillator Interface: 19.375MHz to 27MHz ♦ CMOS Input: 19MHz to 40.5MHz ♦ Output Frequencies Ethernet: 62.5MHz, 125MHz, 156.25MHz, 312.5MHz Fibre Channel: 106.25MHz, 159.375MHz, 212.5MHz, 318.5MHz SONET/SDH: 77.76MHz, 155.52MHz, 311.04MHz ♦ Low Jitter 0.14psRMS (1.875MHz to 20MHz) 0.36psRMS (12kHz to 20MHz) ♦ Excellent Power-Supply Noise Rejection ♦ No External Loop Filter Capacitor Required MAX3624A The MAX3624A is a low-jitter, precision clock generator optimized for networking applications. The device integrates a crystal oscillator and a phase-locked loop (PLL) clock multiplier to generate high-frequency clock outputs for Ethernet, Fibre Channel, SONET/SDH, and other networking applications. Maxim’s proprietary PLL design features ultra-low jitter (0.36psRMS) and excellent power-supply noise rejection, minimizing design risk for network equipment. The MAX3624A has three LVPECL outputs and one LVCMOS output. Selectable output dividers and a selectable feedback divider allow a range of output frequencies. Applications Ethernet Networking Equipment Fibre Channel Storage Area Network SONET/SDH Network Pin Configuration and Typical Application Circuit appear at end of data sheet. Ordering Information PART MAX3624AETJ+ TEMP RANGE -40°C to +85°C PIN-PACKAGE 32 TQFN-EP* +Denotes a lead(Pb)-free/RoHS-complia...