MC100ES6056

Freescale Semiconductor Technical Data MC100ES6056 Rev 4, 06/2005 www.DataSheet4U.com 2.5 V/3.3 V ECL/PECL/LVDS Dual Differential 2:1 Multiplexer The MC100ES6056 is a dual, fully differential 2:1 multiplexer. The differential data path makes the device ideal for multiplexing low skew clock or other skew sensitive signals. Multiple VBB pins are provided. The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01 µF capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open. The device features both individual and common select inputs to address both data path and random logic applications. The 100ES Series contains temperature compensation. Features 360 ps Typical Propagation Delays Maximum Frequency > 3 GHz Typical PECL Mode Operating Range: VCC = 2.375 V to 3.8 V with VEE = 0 V ECL Mode Operating Range: VCC = 0 V with VEE = –2.375 V to –3.8 V Open Input Default State Separate and Common Select Q Output Will Default LOW with Inputs Open or at VEE VBB Outputs LVDS Input Compatible 20-Lead Pb-Free Package Available MC100ES6056 DT SUFFIX 20-LEAD TSSOP PACKAGE CASE 948E-03 EJ SUFFIX 20-LEAD TSSOP PACKAGE Pb-FREE PACKAGE CASE 948E-03 ORDERING INFORMATION Device MC100ES6056DT MC100ES6056DTR2 M...