Document
500 MHz to 1700 MHz, Dual-Balanced Mixer, LO Buffer, IF Amplifier, and RF Balun ADL5358
FEATURES
RF frequency range of 500 MHz to 1700 MHz IF frequency range of 30 MHz to 450 MHz Power conversion gain: 8.3 dB SSB noise figure of 9.9 dB SSB noise figure with 5 dBm blocker of 23 dB Input IP3 of 25.2 dBm Input P1dB of 10.6 dBm Typical LO drive of 0 dBm Single-ended, 50 Ω RF and LO input ports High isolation SPDT LO input switch Single-supply operation: 3.3 V to 5 V Exposed paddle, 6 mm × 6 mm, 36-lead LFCSP
FUNCTIONAL BLOCK DIAGRAM
MNGM COMM MNON MNOP MNLG MNLE VPOS VPOS NC
MNIN MNCT COMM VPOS COMM VPOS COMM DVCT DVIN
LOI2 VGS2 VGS1 VGS0 LOSW PWDN VPOS
APPLICATIONS
Cellular base station receivers Transmit observation receivers Radio link downconverters
ADL5358
COMM LOI1
COMM
GENERAL DESCRIPTION
The ADL5358 uses a highly linear, doubly balanced, passive mixer core along with integrated RF and local oscillator (LO) balancing circuitry to allow single-ended operation. The ADL5358 incorporates the RF baluns, allowing for optimal performance over a 500 MHz to 1700 MHz RF input frequency range. Performance is optimized for RF frequencies from 500 MHz to 1200 MHz using a high-side LO and RF frequencies from 1200 MHz to 1700 MHz using a low-side LO. The balanced www.DataSheet4U.com passive mixer arrangement provides good LO-to-RF leakage, typically better than −20 dBm, and excellent intermodulation performance. The balanced mixer core also provides extremely high input linearity, allowing the device to be used in demanding cellular applications where in-band blocking signals may otherwise result in the degradation of dynamic performance. A high linearity IF buffer amplifier follows the passive mixer core to yield a typical power conversion gain of 8.3 dB and can be used with a wide range of output impedances. The ADL5358 provides two switched LO paths that can be used in TDD applications where it is desirable to ping-pong between two local oscillators. LO current can be externally set using a resistor to minimize dc current commensurate with the desired level of performance. For low voltage applications, the ADL5358 is capable of operation at voltages down to 3.3 V with substantially reduced current. Under low voltage operation, an additional logic pin is provided to power down (<300 μA) the circuit when desired.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
Figure 1.
The ADL5358 is fabricated using a BiCMOS high performance IC process. The device is available in a 6 mm × 6 mm, 36-lead LFCSP and operates over a.