FDG1024NZ

FDG1024NZ Dual N-Channel Power Trench® MOSFET August 2009 FDG1024NZ Dual N-Channel PowerTrench® MOSFET 20 V, 1.2 A, 175 mΩ Features „ Max rDS(on) = 175 mΩ at VGS = 4.5 V, ID = 1.2 A „ Max rDS(on) = 215 mΩ at VGS = 2.5 V, ID = 1.0 A „ Max rDS(on) = 270 mΩ at VGS = 1.8 V, ID = 0.9 A „ Max rDS(on) = 389 mΩ at VGS = 1.5 V, ID = 0.8 A „ HBM ESD protection level >2 kV (Note 3) „ Very low level gate drive requirements allowing operation in 3 V circuits (VGS(th) < 1.5 V) „ Very small package outline SC70-6 „ RoHS Compliant General Description This dual N-Channel logic level enhancement mode field effect transistors are produced using Fairchild’s proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. This device has been designed especially for low voltage applications as a replacement for bipolar digital transistors and small signal MOSFETs. Since bias resistors are not required, this dual digital FET can replace several different digital transistors, with different bias resistor values. G2 D1 S2 S1 1 G1 2 D2 S1 G1 D2 3 6 D1 5 G2 4 S2 SC70-6 www.DataSheet4U.com MOSFET Maximum Ratings TA = 25 °C unless otherwise noted Symbol VDS VGS ID PD TJ, TSTG Parameter Drain to Source Voltage Gate to Source Voltage -Continuous -Pulsed Power Dissipation Power Dissipation TA = 25°C TA = 25°C (Note 1a) (Note 1b) TA = 25°C (Note 1a) Ratings 20 ±8 1.2 6 0.36 0.30 -55 to +150 Units V V A W °C Operating and Storage...