STA2065

www.DataSheet4U.com STA2065 Cartesio™ family infotainment application processor with embedded GPS Data brief Features ■ ARM1176 533/624 MHz host processor – Cache: 32 KB instruction, 32 KB data – Vector floating point unit High performance embedded GPS subsystem – Parallel acquisition engines for 8 GPS satellites or 4 Galileo satellites – 32 tracking channels for all satellites in view – 5 correlators per channel for urban canyon robustness – Multibit signal processing hardware Advanced power management – Separated power islands for ultra low power mode – Dynamic core frequency scaling – 512-Byte embedded SRAM for back-up ■ TFBGA372+100 (16x16x1.2mm) ■ ■ ■ System infrastructure – LP DDR/DDR2 controller: 16/32bit data 512 MB addressable. (333 MHz DDR2, 200 MHz LPDDR) – Static memory controller (bootable): NAND/NOR, SRAM – One bank of 32 KB embedded SRAM – 64-channel vector interrupt controller (VIC) – 2 DMA controllers, 16 physical channels – 32 DMA request for each controller – Two external DMA requests are supported ■ Display and graphics – Color LCD controller for STN,TFT or HRTFT panels with 24-bit parallel RGB interface – Integrated touch screen controller and ADC – 3D advanced graphics acceleration – Video input port (VIP) interface – JPEG baseline profile decoder ■ Audio interfaces and features – Four multichannel serial ports (I2S/TDM) – SPDIF input interface – C3 hardware reed-solomon decoder – Sample rate converter ■ Standard interfaces – Four 16-bit input ...