DatasheetsPDF.com

74AUP2G17

Part Number	74AUP2G17
Manufacturer	NXP Semiconductors
Description	Low-power dual Schmitt trigger
Published	Aug 31, 2009
Detailed Description	com 74AUP2G17 Low-power dual Schmitt trigger Rev. 02 — 10 January 2008 Product data sheet 1. General d...
Datasheet	74AUP2G17 PDF File

Overview

com 74AUP2G17 Low-power dual Schmitt trigger Rev.
02 — 10 January 2008 Product data sheet 1.
General description The 74AUP2G17 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.
This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.
8 V to 3.
6 V.
This device is fully speciﬁed for partial power-down applications using IOFF.
The IOFF circuitry disables the output, preventing the damaging backﬂow current through the device when it is powered down.
The 74AUP2G17 provides two Schmitt trigger buffers.
It is capable of transforming slowly changing input signals ...

Similar Datasheet

74AUP2G00 Low-power dual 2-input NAND gate - NXP
74AUP2G00 DUAL NAND GATE - Diodes
74AUP2G00 Low-power dual 2-input NAND gate - nexperia
74AUP2G00-Q100 Low-power dual 2-input NAND gate - nexperia
74AUP2G02 DUAL NOR GATE - Diodes
74AUP2G02 Low-power Dual 2-input NOR Gate - NXP
74AUP2G02 Low-power dual 2-input NOR gate - nexperia
74AUP2G04 Low-power dual inverter - NXP
74AUP2G04 DUAL INVERTERS - Diodes
74AUP2G04 Low-power dual inverter - nexperia

Since 2006. D4U Semicon,
Electronic Components Datasheet Search Site. (Privacy Policy & Contact)