ADV3000

www.DataSheet4U.com 3:1 HDMI/DVI Switch with Equalization ADV3000 FEATURES 3 inputs, 1 output HDMI/DVI links Enables HDMI 1.3-compliant receiver 4 TMDS channels per link Supports 250 Mbps to 2.25 Gbps data rates Supports 25 MHz to 225 MHz pixel clocks Equalized inputs for operation with long HDMI cables (20 meters at 2.25 Gbps) Fully buffered unidirectional inputs/outputs Globally switchable, 50 Ω on-chip terminations Pre-emphasized outputs Low added jitter Single-supply operation (3.3 V) 4 auxiliary channels per link Bidirectional unbuffered inputs/outputs Flexible supply operation (3.3 V to 5 V) HDCP standard compatible Allows switching of DDC bus and 2 additional signals Output disable feature Reduced power dissipation Removable output termination Allows building of larger arrays Two ADV3000s support HDMI/DVI dual-link Standards compatible: HDMI receiver, HDCP, DVI Serial (I2C slave) and parallel control interface 80-lead, 14 mm × 14 mm LQFP, Pb-free package FUNCTIONAL BLOCK DIAGRAM PP_CH[1:0] PP_OCL PP_EQ PP_EN PP_PRE[1:0] RESET PARALLEL SERIAL I2C_SDA I2C_SCL I2C_ADDR0 VTTI 2 2 ADV3000 CONTROL LOGIC AVCC DVCC AMUXVCC AVEE DVEE VTTO CONFIG INTERFACE + IP_A[3:0] IN_A[3:0] – + IP_B[3:0] IN_B[3:0] – + IP_C[3:0] 4 4 4 4 4 4 SWITCH CORE EQ 4 4 PE + OP[3:0] – ON[3:0] IN_C[3:0] – HIGH SPEED VTTI AUX_A[3:0] AUX_B[3:0] AUX_C[3:0] BUFFERED 4 4 4 SWITCH CORE LOW SPEED UNBUFFERED BIDIRECTIONAL 4 AUX_COM[3:0] 06712-002 Figure 2. GENERAL DESCRIPTION The ADV3000 i...