Document
FDMA1024NZ Dual N-Channel Power Trench® MOSFET
May 2009
FDMA1024NZ
www.datasheet4u.com
Dual N-Channel PowerTrench® MOSFET
20 V, 5.0 A, 54 mΩ Features
Max rDS(on) = 54 mΩ at VGS = 4.5 V, ID = 5.0 A Max rDS(on) = 66 mΩ at VGS = 2.5 V, ID = 4.2 A Max rDS(on) = 82 mΩ at VGS = 1.8 V, ID = 2.3 A Max rDS(on) = 114 mΩ at VGS = 1.5 V, ID = 2.0 A
General Description
This device is designed specifically as a single package solution for dual switching requirements in cellular handset and other ultra-portable applications. It features two independent N-Channel MOSFETs with low on-state resistance for minimum conduction losses. The MicroFET 2X2 package offers exceptional thermal performance for its physical size and is well suited to linear mode applications.
HBM ESD protection level = 1.6 kV (Note 3) Low profile - 0.8 mm maximum - in the new package MicroFET 2x2 mm RoHS Compliant Free from halogenated compounds and antimony oxides
Applications
Baseband Switch Loadswitch DC-DC Conversion
PIN 1
S1
G1
D2 S1 1 2 3 6 5 4 D1 G2 S2
D1
D2 G1 D2
D1 MicroFET 2x2
G2 S2
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol VDS VGS ID PD TJ, TSTG Parameter Drain to Source Voltage Gate to Source Voltage Drain Current -Continuous -Pulsed Power Dissipation Power Dissipation Operating and Storage Junction Temperature Range (Note 1a) (Note 1b) (Note 1a) Ratings 20 ±8 5.0 6.0 1.4 0.7 –55 to +150 Units V V A W °C
Thermal Characteristics
RθJA RθJA RθJA RθJA Thermal Resistance, Junction to Ambient Thermal Resistance, Junction to Ambient Thermal Resistance, Junction to Ambient Thermal Resistance, Junction to Ambient (Note 1a) (Note 1b) (Note 1c) (Note 1d) 86 (Single Operation) 173 (Single Operation) 69 (Dual Operation) 151 (Dual Operation) °C/W
Package Marking and Ordering Information
Device Marking 024 Device FDMA1024NZ Package MicroFET 2X2 Reel Size 7” Tape Width 8 mm Quantity 3000 units
©2009 Fairchild Semiconductor Corporation FDMA1024NZ Rev.B3
1
www.fairchildsemi.com
FDMA1024NZ Dual N-Channel Power Trench® MOSFET
Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BVDSS ∆BVDSS www.datasheet4u.com ∆TJ IDSS IGSS Drain to Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate to Source Leakage Current ID = 250 µA, VGS = 0 V ID = 250 µA, referenced to 25 °C VDS = 16 V, VGS = 0 V VGS = ±8 V, VDS = 0 V 20 19 1 ±10 V mV/°C µA µA
On Characteristics
VGS(th) ∆VGS(th) ∆TJ Gate to Source Threshold Voltage Gate to Source Threshold Voltage Temperature Coefficient VGS = VDS, ID = 250 µA ID = 250 µA, referenced to 25 °C VGS = 4.5 V, ID = 5.0 A VGS = 2.5 V, ID = 4.2 A rDS(on) Static Drain to Source On-Resistance VGS = 1.8 V, ID = 2.3 A VGS = 1.5 V, ID = 2.0 A VGS = 4.5 V, ID = 5.0 A, TJ = 125 °C gFS Forward Transconductance VDD = 5 V, ID = 5.0 A 0.4 0.7 -3 37 43 52 67 51 16 54 66 82 114 75 S mΩ 1.0 V mV/°C
Dynamic Characteristics
Ciss Coss Crss RG Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance VDS = 10 V, VGS = 0 V, f = 1 MHz f = 1 MHz 375 70 40 4.3 500 95 65 pF pF pF Ω
Switching Characteristics
td(on) tr td(off) tf Qg Qgs Qgd Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Gate to Source Gate Charge Gate to Drain “Miller” Charge VGS = 4.5 V, VDD = 10 V, ID = 5.0 A VDD = 10 V, ID = 5.0 A VGS = 4.5 V, RGEN = 6 Ω 5.3 2.2 18 2.3 5.2 0.6 0.9 11 10 33 10 7.3 ns ns ns ns nC nC nC
Drain-Source Diode Characteristics
IS VSD trr Qrr Maximum Continuous Source-Drain Diode Forward Current Source to Drain Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS = 0 V, IS = 1.1 A IF = 5.0 A, di/dt = 100 A/µs (Note 2) 0.7 19 5 1.1 1.2 35 10 A V ns nC
©2009 Fairchild Semiconductor Corporation FDMA1024NZ Rev.B3
2
www.fairchildsemi.com
FDMA1024NZ Dual N-Channel Power Trench® MOSFET
Notes: 1. RθJA is determined with the device mounted on a 1 in2 oz. copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθJA is determined by the user's board design. (a) RθJA = 86 °C/W when mounted on a 1 in2 pad of 2 oz copper, 1.5 " x 1.5 " x 0.062 " thick PCB. For single operation. (b) RθJA = 173 °C/W when mounted on a minimum pad of 2 oz copper. For single operation. (c) RθJA = 69 oC/W when mounted on a 1 in2 pad of 2 oz copper, 1.5 ” x 1.5 ” x 0.062 ” thick PCB. For dual operation. (d) RθJA = 151 oC/W when mounted on a minimum pad of 2 oz copper. For dual operation.
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a)86 oC/W when mounted on a 1 in2 pad of 2 oz copper.
b)173 oC/W when mounted on a minimum pad of 2 oz copper.
c)69 oC/W when mounted on a 1 in2 pad of 2 oz copper.
d)151 oC/W when mounted on a minimum pad of 2 oz copper.
2. Pulse Test : Pulse Width < 300 us, Duty Cycle < 2.0 % 3: The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is imp.