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HD74LVC1G97 Dataheets PDF



Part Number HD74LVC1G97
Manufacturers Renesas Technology
Logo Renesas Technology
Description Configurable Multiple-Function Gate
Datasheet HD74LVC1G97 DatasheetHD74LVC1G97 Datasheet (PDF)

www.datasheet4u.com HD74LVC1G97 Configurable Multiple–Function Gate REJ03D0015–0400Z Rev.4.00 Jun. 29, 2004 Description The HD74LVC1G97 has configurable multiple–function gate in a 6-pin package. The Output state is determined by eight patterns of 3–bit input. The user can choose the logic functions AND, NAND, OR, NOR, INVERTER, Non– Invert Buffer, Data Selector. Low voltage and high-speed operation is suitable for the battery powered products (e.g., notebook computers), and the low power cons.

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www.datasheet4u.com HD74LVC1G97 Configurable Multiple–Function Gate REJ03D0015–0400Z Rev.4.00 Jun. 29, 2004 Description The HD74LVC1G97 has configurable multiple–function gate in a 6-pin package. The Output state is determined by eight patterns of 3–bit input. The user can choose the logic functions AND, NAND, OR, NOR, INVERTER, Non– Invert Buffer, Data Selector. Low voltage and high-speed operation is suitable for the battery powered products (e.g., notebook computers), and the low power consumption extends the battery life. Features • The basic gate function is lined up as Renesas uni logic series. • Supply voltage range: 1.65 to 5.5 V Operating temperature range: –40 to +85°C • All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) All outputs VO (Max.) = 5.5 V (@VCC = 0 V) • Output current: ±4 mA (@VCC = 1.65 V) ±8 mA (@VCC = 2.3 V) ±24 mA (@VCC = 3.0 V) ±32 mA (@VCC = 4.5 V) • All the logical input has hysteresis voltage for the slow transition. • Ordering Information Part Name HD74LVC1G97CPE HD74LVC1G97CLE Package Type WCSP-6 pin Package Code TBS-6V TBS-6AV Package Abbreviation CP CL Taping Abbreviation (Quantity) E (3,000 pcs/reel) Article Indication Marking Year code Month code K2YM Rev.4.00 Jun. 29, 2004 page 1 of 10 HD74LVC1G97 www.datasheet4u.com Function Table IN2 L L L L H H H H H : High level L : Low level L L H H L L H H Inputs IN1 L H L H L H L H IN0 L L H H L H L H Output Y Pin Arrangement 0.9 mm Height 0.5 mm 0.5 mm pitch 0.17 mm 6–Ball (CP) IN0 0.23 mm 6–Ball (CL) 3 4 Y GND 2 5 VCC 1.4 mm Pin#1 INDEX IN1 1 6 IN2 (Bottom view) (Top view) Logic Diagram IN0 Y IN1 IN2 Rev.4.00 Jun. 29, 2004 page 2 of 10 HD74LVC1G97 www.datasheet4u.com Function Selection Table Logic Function 2 to 1 data Selector 2–inputs AND 2–inputs OR with one input inverted 2–inputs NAND with one input inverted 2–inputs AND with one input inverted 2–inputs NOR with one input inverted 2–inputs OR Inverter Non–Inverter Buffer Figure No. 1 2 3 3 4 4 5 6 7 Rev.4.00 Jun. 29, 2004 page 3 of 10 HD74LVC1G97 www.datasheet4u.com Logic Configurations VCC A/B A B A Y B 1 (IN1) (IN2) 6 A/B 2 (GND) (VCC) 5 3 (IN0) (Y) 4 Y Figure 1. 2 to 1 Data Selecter VCC VCC 1 (IN1) (IN2) 6 A B A B 1 (IN1) (IN2) 6 A Y 2 (GND) (VCC) 5 A B A B A Y 2 (GND) (VCC) 5 Y B Y 3 (IN0) (Y) 4 Y B 3 (IN0) (Y) 4 Y Figure 2. 2–inputs AND Gate VCC Figure 3. 2–inputs OR Gate with A input inverted VCC A B A B B Y 1 (IN1) (IN2) 6 A A B A B Y Y B 1 (IN1) (IN2) 6 A 2 (GND) (VCC) 5 2 (GND) (VCC) 5 3 (IN0) (Y) 4 Y 3 (IN0) (Y) 4 Y Y Figure 4. 2–inputs AND Gate with A input inverted VCC Figure 5. 2–inputs OR Gate VCC 1 (IN1) (IN2) 6 A A Y Y A 1 (IN1) (IN2) 6 A Y 2 (GND) (VCC) 5 3 (IN0) (Y) 4 2 (GND) (VCC) 5 3 (IN0) (Y) 4 Y Figure 6. Inverter Figure 7. Non–Invert Butter Rev.4.00 Jun. 29, 2004 page 4 of 10 HD74LVC1G97 www.datasheet4u.com Absolute Maximum Ratings Item Supply voltage range Input voltage range *1 Output voltage range *1, 2 Input clamp current Output clamp current Continuous output current Continuous current through VCC or GND Package Thermal impedance Symbol VCC VI VO IIK IOK IO ICC or IGND θja Ratings –0.5 to 6.5 –0.5 to 6.5 –0.5 to VCC + 0.5 –0.5 to 6.5 –50 –50 ±50 ±100 Unit V V V mA mA mA mA Test Conditions Output : H or L VCC : OFF VI < 0 VO < 0 VO = 0 to VCC 143 °C/W CP 123 CL Storage temperature Tstg –65 to 150 °C Notes: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore no two of which may be realized at the same time. 1. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. This value is limited to 5.5 V maximum. Recommended Operating Conditions Item Supply voltage range Input voltage range Output voltage range Output current Symbol VCC VI VO IOL 1.65 0 0 — — — — — — — — — — 0 0 0 Operating free-air temperature Ta –40 Note: Unused or floating inputs must be held high or low. Min 5.5 5.5 VCC 4 8 16 24 32 3 –4 – –8 – –16 –24 –32 20 10 5 85 °C Max V V V mA Unit Conditions VCC = 1.65 V VCC = 2.3 V VCC = 3.0 V VCC = 4.5 V VCC = 1.65 V VCC = 2.3 V VCC = 3.0 V VCC = 4.5 V VCC = 1.65 to 1.95 V, 2.3 to 2.7 V VCC = 3.0 to 3.6 V VCC = 4.5 to 5.5 V IOH Input transition rise or fall rate ∆t / ∆v ns / V Rev.4.00 Jun. 29, 2004 page 5 of 10 HD74LVC1G97 www.datasheet4u.com Electrical Characteristics Ta = –40 to 85°C Item Threshold voltage Symbol VT+ VCC (V) 1.8 2.5 3.3 5.0 1.8 2.5 3.3 5.0 1.8 2.5 3.3 5.0 1.65 to 5.5 1.65 2.3 3.0 4.5 1.65 to 5.5 1.65 2.3 3.0 4.5 0 to 5.5 5.5 3 to 5.5 Min 0.8 1.2 1.6 2.3 0.4 0.6 0.9 1.5 0.4 0.4 0.4 0.4 VCC–0.1 1.2 1.9 2.4 2.3 3.8 — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — Typ 1.4 1.7 2.3 3.0 0.7 1.0 1.4 2.0 0.7 0.8 0.9 1.0 — — — — — — 0.1 0.45 0.3 0.4 0.55 0.55 ±5 10 500 Max Unit V Test condition VT– ∆VT Output voltage VOH V IOH = 100 µA IOH = –4 mA IOH = –8 mA IOH = –16 mA IOH = –24 mA IOH = –32 mA IOL.


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