SPP16N50C3 SPI16N50C3, SPA16N50C3
Cool MOS™ Power Transistor
Feature • New revolutionary high voltage technology • Ultra low gate charge
VDS @ Tjmax RDS(on) ID
560 0.28 16
V Ω A
• Periodic avalanche rated
PG-TO220FP PG-TO262
PG-TO220
• Extreme dv/dt rated
2
• Ultra low effective capacitances • Improved transconductance
P-TO220-3-31
3 12
• PG-TO-220-3-31;-3-111: Fully isolated package (2500 VAC; 1 minute)
P-TO220-3-1
123
Type SPP16N50C3 SPI16N50C3 SPA16N50C3
Package PG-TO220 PG-TO262 PG-TO220FP
Ordering Code Q67040-S4583 Q67040-S4582 SP000216351
Marking 16N50C3 16N50C3 16N50C3
Maximum Ratings Parameter
Continuous drain current
TC = 25 °C TC = 100 °C
Pulsed drain current, tp limited by Tjmax Avalanche energy, single pulse
ID=8, VDD=50V
Avalanche energy, repetitive tAR limited by Tjmax2)
ID=16A, VDD=50V
Avalanche current, repetitive tAR limited by Tjmax Gate source voltage Gate source voltage AC (f >1Hz) Power dissipation, TC = 25°C Operating and storage temperature Reverse diode dv/dt 6)
Symbol
ID
ID puls EAS
EAR
IAR VGS VGS Ptot Tj , Tstg dv/dt
Value
SPP_I
SPA
16 161) 10 101)
48 48 460 460
0.64 0.64
16 16 ±20 ±20 ±30 ±30 160 34
-55...+150 15
Unit A
A mJ
A V W °C V/ns
Rev. 3.2
page 1
2009-12-22
SPP16N50C3 SPI16N50C3, SPA16N50C3
Maximum Ratings Parameter Drain Source voltage slope
VDS = 400 V, ID = 16 A, Tj = 125 °C
Thermal Characteristics Parameter
Thermal resistance, junction - case Thermal resistance, junction - case, FullPAK Thermal resistance, junction - ambient, leaded Thermal resistance, junction - ambient, FullPAK Soldering temperature, wavesoldering 1.6 mm (0.063 in.) from case for 10s3)
Symbol dv/dt
Value 50
Unit V/ns
Symbol
RthJC RthJC_FP RthJA RthJA FP Tsold
Values min. typ. max.
- - 0.78 - - 3.7 - - 62 - - 80 - - 260
Unit K/W
°C
Electrical Characteristics, at Tj=25°C unless otherwise specified
Parameter
Symbol Conditions
Values
min. typ. max.
Drain-source breakdown voltage Drain-Source avalanche breakdown voltage
V(BR)DSS VGS=0V, ID=0.25mA V(BR)DS VGS=0V, ID=16A
500 -
600
-
Gate threshold voltage
VGS(th) ID=675µA, VGS=VDS 2.1 3 3.9
Zero gate voltage drain current IDSS
VDS=500V, VGS=0V,
Tj=25°C
- 0.1 1
Tj=150°C
- - 100
Gate-source leakage current
I GSS
Drain-source on-state resistance RDS(on)
VGS=20V, VDS=0V VGS=10V, ID=10A Tj=25°C Tj=150°C
- - 100
- 0.25 0.28 - 0.68 -
Gate input resistance
RG
f=1MHz, open drain
-
1.5
-
Unit V
µA
nA Ω
Rev. 3.2
page 2
2009-12-22
SPP16N50C3 SPI16N50C3, SPA16N50C3
Electrical Characteristics, at Tj = 25 °C, unless otherwise specified
Parameter
Symbol
Conditions
min.
Characteristics
Transconductance
gfs
Input capacitance
Ciss
Output capacitance
Coss
Reverse transfer capacitance Crss Effective output capacitance,4) Co(er) energy related
Effective output capacitance,5) Co(tr) time related
VDS≥2*ID*RDS(on)max, ID=10A VGS=0V, VDS=25V, f=1MHz
VGS=0V, VDS=0V to 400V
-
-
-
Turn-on delay time Rise time Turn-off delay time Fall time
td(on) tr td(off) tf
VDD=380V, VGS=0/10V, ID=16A, RG=4.3Ω
-
Values typ. max.
14 -
1600 800 30 64
-
124 -
10 850 8-
Unit S pF
ns
Gate Charge Characteristics
Gate to source charge
Qgs VDD=380V, ID=16A
Gate to drain charge Gate charge total
Qgd Qg
VDD=380V, ID=16A, VGS=0 to 10V
Gate plateau voltage
V(plateau) VDD=380V, ID=16A
- 7 - nC - 36 - 66 -
- 5 -V
1Limited only by maximum temperature 2Repetitve avalanche causes additional power losses that can be calculated asPAV=EAR*f.
3Soldering temperature for TO-263: 220°C, reflow 4Co(er) is a fixed capacitance that gives the same stored energy as Coss while VDS is rising from 0 to 80% VDSS.
5Co(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. 6ISD<=ID, di/dt<=400A/us, VDClink=400V, Vpeak