ICS83948I

Integrated Circuit Systems, Inc. ICS83948I LOW SKEW, 1-TO-12 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER FEATURES Twelve LVCMOS outputs Selectable LVCMOS clock or differential CLK, nCLK inputs CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL LVCMOS_CLK accepts the following input levels: LVCMOS or LVTTL Maximum output frequency: 250MHz Output skew: 350ps (maximum) Part to part skew: 1.5ns (maximum) 3.3V core, 3.3V output -40°C to 85°C ambient operating temperature Available in both standard and lead-free RoHS-compliant packages GENERAL DESCRIPTION The ICS83948I is a low skew, 1-to-12 Differential-to-LVCMOS Fanout Buffer and a member HiPerClockS™ of the HiPerClock S ™ family of High Performance Clock Solutions from ICS. The ICS83948I has two selectable clock inputs. The CLK, nCLK pair can accept most standard differential input levels. The LVCMOS_CLK can accept LVCMOS or LVTTL input levels. The low impedance LVCMOS outputs are designed to drive 50Ω series or parallel terminated transmission lines. The www.DataSheet4U.com effective fanout can be increased from 12 to 24 by utilizing the ability of the outputs to drive two series terminated lines. IC S The ICS83948I is characterized at 3.3V core/3.3V output. Guaranteed output and part-to-part skew characteristics make the ICS83948I ideal for those clock distribution applications demanding well defined performance and repeatability. BLOCK DIAGRAM CLK_EN D Q LE LV...