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LH534B00

Sharp Electrionic Components

CMOS 4M (512K x 8) MROM

LH534B00 FEATURES • 524,288 words × 8 bit organization • Access time: 120 ns (MAX.) • Power consumption: Operating: 330 ...


Sharp Electrionic Components

LH534B00

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Description
LH534B00 FEATURES 524,288 words × 8 bit organization Access time: 120 ns (MAX.) Power consumption: Operating: 330 mW (MAX.) Standby: 550 µW (MAX.) Static operation TTL compatible I/O Three-state outputs Single +5 V power supply Package: 40-pin, 10 × 20 mm2 TSOP (Type I) DESCRIPTION The LH534B00 is a 4M-bit mask-programmable ROM organized as 524,288 × 8 bits. It is fabricated using silicon-gate CMOS process technology. A16 A15 A14 A13 A12 A11 A9 A8 NC NC NC NC A18 A7 A6 A5 A4 A3 A2 A1 CMOS 4M (512K × 8) MROM PIN CONNECTIONS 40-PIN TSOP (Type I) TOP VIEW 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 A17 GND NC NC A10 D7 D6 D5 D4 VCC VCC NC D3 D2 D1 D0 OE GND CE A0 534B00-1 Figure 1. Pin Connections for TSOP Package 1 LH534B00 CMOS 4M MROM A18 13 A17 40 A16 A15 A14 A13 1 2 3 4 A11 6 A10 36 A9 A8 A7 A6 7 8 14 15 A5 16 A4 17 A3 18 A2 19 A1 20 A0 21 ADDRESS BUFFER A12 5 ADDRESS DECODER MEMORY MATRIX (524,288 x 8) COLUMN SELECTOR SENSE AMPLIFIER CE 22 CE BUFFER TIMING GENERATOR OUTPUT BUFFER OE 24 OE BUFFER 30 31 VCC 23 39 GND 25 D0 26 D1 27 D2 28 D3 32 D4 33 D5 34 D6 35 D7 534B00-2 Figure 2. LH534B00 Block Diagram PIN DESCRIPTION SIGNAL PIN NAME SIGNAL PIN NAME A0 – A18 D0 – D7 CE OE Address input Data output Chip enable input Output enable input VCC GND NC Power supply (+5 V) Ground No connection 2 CMOS 4M MROM LH534B00 TRUTH TABLE CE OE DATA OUTPUT SUPPLY CURR...




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