DatasheetsPDF.com

ADN2811

Analog Devices

OC-48/OC-48 FEC Clock and Data Recovery IC

a OC-48/OC-48 FEC Clock and Data Recovery IC with Integrated Limiting Amp ADN2811 PRODUCT DESCRIPTION FEATURES Meets S...


Analog Devices

ADN2811

File Download Download ADN2811 Datasheet


Description
a OC-48/OC-48 FEC Clock and Data Recovery IC with Integrated Limiting Amp ADN2811 PRODUCT DESCRIPTION FEATURES Meets SONET Requirements for Jitter Transfer/ Generation/Tolerance Quantizer Sensitivity: 4 mV Typ Adjustable Slice Level: ؎ 100 mV 1.9 GHz Minimum Bandwidth Patented Clock Recovery Architecture Loss of Signal Detect Range: 3 mV to 15 mV www.DataSheet4U.com Single Reference Clock Frequency for Both Native SONET and 15/14 (7%) Wrapper Rate Choice of 19.44 MHz, 38.88 MHz, 77.76 MHz, or 155.52 MHz REFCLK LVPECL/LVDS/LVCMOS/LVTTL Compatible Inputs (LVPECL/LVDS Only at 155.52 MHz) 19.44 MHz Oscillator On-Chip to Be Used with External Crystal Loss of Lock Indicator Loopback Mode for High Speed Test Data Output Squelch and Bypass Features Single-Supply Operation: 3.3 V Low Power: 540 mW Typical 7 mm ؋ 7 mm 48-Lead LFCSP APPLICATIONS SONET OC-48, SDH STM-16, and 15/14 FEC WDM Transponders Regenerators/Repeaters Test Equipment Backplane Applications The ADN2811 provides the receiver functions of quantization, signal level detect, and clock and data recovery at OC-48 and OC-48 FEC rates. All SONET jitter requirements are met, including jitter transfer, jitter generation, and jitter tolerance. All specifications are quoted for –40؇C to +85؇C ambient temperature, unless otherwise noted. The device is intended for WDM system applications and can be used with either an external reference clock or an on-chip oscillator with external crystal. Both the 2.48 Gb/s and 2.66 Gb/s digi...




Similar Datasheet




@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (Privacy Policy & Contact)