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IDT74ALVCH162827

Integrated Device Technology

3.3V CMOS 20-BIT BUFFER/ DRIVER

IDT74ALVCH162827 3.3V CMOS 20-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS AND BUS-HOLD INDUSTRIAL TEMPERATURE RANGE 3.3V CM...


Integrated Device Technology

IDT74ALVCH162827

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Description
IDT74ALVCH162827 3.3V CMOS 20-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS AND BUS-HOLD INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 20-BIT BUFFER/ DRIVER WITH 3-STATE OUTPUTS AND BUS-HOLD FEATURES: DESCRIPTION: IDT74ALVCH162827 0.5 MICRON CMOS Technology Typical tSK(o) (Output Skew) < 250ps ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) VCC = 3.3V ± 0.3V, Normal Range VCC = 2.7V to 3.6V, Extended Range www.DataSheet4U.com VCC = 2.5V ± 0.2V CMOS power levels (0.4µ W typ. static) Rail-to-Rail output swing for increased noise margin Available in TSSOP package DRIVE FEATURES: Balanced Output Drivers: ±12mA Low switching noise This 20-bit buffer/driver is built using advanced dual metal CMOS technology. The ALVCH162827 device provides high-performance bus interface buffering for wide data/address paths or busses carrying parity. Two pairs of NAND-ed output enable controls offer maximum control flexibility and are organized to operate the device as two 10-bit buffers or one 20-bit buffer. Flow-through organization of signal pins facilitates ease of layout. All inputs are designed with hysteresis for improved noise margin. The ALVCH162827 has series resistors in the device output structure which will significantly reduce line noise when used with light loads. This driver has been designed to drive ±12mA at the designated threshold levels. The ALVCH162827 has “bus-hold” which retains the inputs’ last state whenever the input ...




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