TH50VSF2583AASB

TH50VSF2582/2583AASB TENTATIVE TOSHIBA MULTI-CHIP INTEGRATED CIRCUIT SILICON GATE CMOS SRAM AND FLASH MEMORY MIXED MULTI-CHIP PACKAGE DESCRIPTION The TH50VSF2582/2583AASB is a mixed multi-chip package containing a 4,194,304-bit full CMOS SRAM and a 33,554,432-bit flash memory. The CIOS and CIOF inputs can be used to select the optimal memory configuration. The power supply for the TH50VSF2582/2583AASB can range from 2.7 V to 3.6 V. The TH50VSF2582/2583AASB can perform simultaneous read/write operations on its flash memory and is available in a 69-pin BGA package, making it suitable for a variety of applications. FEATURES Power supply voltage VCCs = 2.7 V~3.6 V V = 2.7 V~3.6 V www.DataSheet4U.comCCf Data retention supply voltage VCCs = 1.5 V~3.6 V Current consumption Operating: 45 mA maximum (CMOS level) Standby: 7 µA maximum (SRAM CMOS level) Standby: 10 µA maximum (flash CMOS level) Block erase architecture for flash memory 8 blocks of 8 Kbytes 63 blocks of 64 Kbytes Organization CIOF VCC VCC VSS CIOS VCC VSS VSS Flash Memory 2,097,152 words of 16 bits 2,097,152 words of 16 bits 4,194,304 words of 8 bits SRAM 262,144 words of 16 bits 524,288 words of 8 bits 524,288 words of 8 bits Function mode control for flash memory Compatible with JEDEC-standard commands Flash memory functions Simultaneous Read/Write operations Auto-Program Auto Chip Erase, Auto Block Erase Auto Multiple-Block Erase Program Suspend/Resume Block-Erase Suspend/Resume Data Polling /...