Document
PMF780SN
N-channel µTrenchMOS™ standard level FET
Rev. 01 — 10 February 2004
M3D102
Product data
1. Product profile
1.1 Description
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N-channel enhancement mode field-effect transistor in a plastic package using TrenchMOS™ technology.
1.2 Features
s Surface mounted package s Low on-state resistance s Footprint 40% smaller than SOT23 s Fast switching.
1.3 Applications
s Driver circuits s Switching in portable appliances.
1.4 Quick reference data
s VDS ≤ 60 V s Ptot ≤ 0.56 W s ID ≤ 0.57 A s RDSon ≤ 920 mΩ.
2. Pinning information
Table 1: Pin 1 2 3 Pinning - SOT323 (SC-70), simplified outline and symbol Description gate (g) source (s) drain (d)
g 1 Top view 2
MBC870
Simplified outline
3
Symbol
d
MBB076
s
SOT323 (SC-70)
Philips Semiconductors
PMF780SN
N-channel µTrenchMOS™ standard level FET
3. Ordering information
Table 2: Ordering information Package Name PMF780SN SC-70 Description Plastic surface mounted package; 3 leads Version SOT323 Type number
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4. Limiting values
Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDS VDGR VGS ID IDM Ptot Tstg Tj IS ISM drain-source voltage (DC) drain-gate voltage (DC) gate-source voltage (DC) drain current (DC) peak drain current total power dissipation storage temperature junction temperature source (diode forward) current (DC) Tsp = 25 °C peak source (diode forward) current Tsp = 25 °C; pulsed; tp ≤ 10 µs Tsp = 25 °C; VGS = 10 V; Figure 2 and 3 Tsp = 100 °C; VGS = 10 V; Figure 2 Tsp = 25 °C; pulsed; tp ≤ 10 µs; Figure 3 Tsp = 25 °C; Figure 1 Conditions 25 °C ≤ Tj ≤ 150 °C 25 °C ≤ Tj ≤ 150 °C; RGS = 20 kΩ Min −55 −55 Max 60 60 ±20 0.57 0.36 1.15 0.56 +150 +150 0.47 0.94 Unit V V V A A A W °C °C A A
Source-drain diode
9397 750 12764
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 01 — 10 February 2004
2 of 12
Philips Semiconductors
PMF780SN
N-channel µTrenchMOS™ standard level FET
120 Pder (%) 80
03aa17
120 Ider (%) 80
03aa25
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40
40
0 0 50 100 150 Tsp (°C) 200
0 0 50 100 150 200 Tsp (°C)
P tot P der = ---------------------- × 100 % P °
tot ( 25 C )
ID I der = ------------------- × 100 % I °
D ( 25 C )
Fig 1. Normalized total power dissipation as a function of solder point temperature.
Fig 2. Normalized continuous drain current as a function of solder point temperature.
10 ID (A) 1
03an23
Limit RDSon = VDS / ID
tp = 10 µ s
100 µ s 10-1 DC
1 ms 10 ms 100 ms
10-2
10-3 10-1
1
10 VDS(V)
102
Tsp = 25 °C; IDM is single pulse; VGS = 10 V.
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
9397 750 12764
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 01 — 10 February 2004
3 of 12
Philips Semiconductors
PMF780SN
N-channel µTrenchMOS™ standard level FET
5. Thermal characteristics
Table 4: Rth(j-sp) Thermal characteristics Conditions F.