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MTW6N100E Dataheets PDF



Part Number MTW6N100E
Manufacturers Motorola
Logo Motorola
Description TMOS POWER FET
Datasheet MTW6N100E DatasheetMTW6N100E Datasheet (PDF)

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MTW6N100E/D Designer's TMOS E-FET .™ Power Field Effect Transistor TO-247 With Isolated Mounting Hole N–Channel Enhancement–Mode Silicon Gate This high voltage MOSFET uses an advanced termination scheme to provide enhanced voltage–blocking capability without degrading performance over time. In addition, this advanced TMOS E–FET is designed to withstand high energy in the avalanche and commutation modes. The new energy efficient des.

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MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MTW6N100E/D Designer's TMOS E-FET .™ Power Field Effect Transistor TO-247 With Isolated Mounting Hole N–Channel Enhancement–Mode Silicon Gate This high voltage MOSFET uses an advanced termination scheme to provide enhanced voltage–blocking capability without degrading performance over time. In addition, this advanced TMOS E–FET is designed to withstand high energy in the avalanche and commutation modes. The new energy efficient design also offers a drain–to–source diode with a fast recovery time. Designed for high www.DataSheet4U.com voltage, high speed switching applications in power supplies, converters and PWM motor controls, these devices are particularly well suited for bridge circuits where diode speed and commutating safe operating areas are critical and offer additional safety margin against unexpected voltage transients. • Robust High Voltage Termination • Avalanche Energy Specified • Source–to–Drain Diode Recovery Time Comparable to a Discrete Fast Recovery Diode • Diode is Characterized for Use in Bridge Circuits • IDSS and VDS(on) Specified at Elevated Temperature • Isolated Mounting Hole Reduces Mounting Hardware MAXIMUM RATINGS (TC = 25°C unless otherwise noted) Rating Drain–Source Voltage Drain–Gate Voltage (RGS = 1.0 MΩ) Gate–Source Voltage — Continuous Gate–Source Voltage — Non–Repetitive (tp ≤ 10 ms) Drain Current — Continuous Drain Current — Continuous @ 100°C Drain Current — Single Pulse (tp ≤ 10 µs) Total Power Dissipation Derate above 25°C Operating and Storage Temperature Range Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25°C (VDD = 50 Vdc, VGS = 10 Vdc, IL = 6.0 Apk, L = 27.77 mH, RG = 25 Ω) Thermal Resistance — Junction to Case Thermal Resistance — Junction to Ambient Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds Symbol VDSS VDGR VGS VGSM ID ID IDM PD TJ, Tstg EAS RθJC RθJA TL G S ™ Data Sheet MTW6N100E Motorola Preferred Device TMOS POWER FET 6.0 AMPERES 1000 VOLTS RDS(on) = 1.5 OHM ® D CASE 340K–01, Style 1 TO–247AE Value 1000 1000 ± 20 ± 40 6.0 4.2 18 180 1.43 – 55 to 150 720 0.70 40 260 Unit Vdc Vdc Vdc Vpk Adc Apk Watts W/°C °C mJ °C/W °C Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit curves — representing boundaries on device characteristics — are given to facilitate “worst case” design. E–FET and Designer’s are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc. Preferred devices are Motorola recommended choices for future use and best overall value. REV 3 TMOS ©Motorola Motorola, Inc. 1996 Power MOSFET Transistor Device Data 1 MTW6N100E ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Characteristic OFF CHARACTERISTICS Drain–Source Breakdown Voltage (VGS = 0 Vdc, ID = 250 µAdc) Temperature Coefficient (Positive) Zero Gate Voltage Drain Current (VDS = 1000 Vdc, VGS = 0 Vdc) (VDS = 1000 Vdc, VGS = 0 Vdc, TJ = 125°C) Gate–Body Leakage Current (VGS = ± 20 Vdc, VDS = 0) ON CHARACTERISTICS (1) Gate Threshold Voltage (VDS = VGS, ID = 250 µAdc) Temperature Coefficient (Negative) Static Drain–Source On–Resistance (VGS = 10 Vdc, ID = 3.0 Adc) www.DataSheet4U.com Drain–Source On–Voltage (VGS = 10 Vdc) (ID = 6.0 Adc) (ID = 3.0 Adc, TJ = 125°C) Forward Transconductance (VDS = 10 Vdc, ID = 3.0 Adc) DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Reverse Transfer Capacitance SWITCHING CHARACTERISTICS (2) Turn–On Delay Time Rise Time Turn–Off Delay Time Fall Time Gate Charge (See Figure 8) Vd ID = 6 0 Ad (VDS = 800 Vdc, 6.0 Adc, VGS = 10 Vdc) (VDD = 500 Vdc, Vd ID = 6 6.0 0 Ad Adc, VGS = 10 Vdc Vdc, RG = 9 9.1 Ω) td(on) tr td(off) tf QT Q1 Q2 Q3 SOURCE–DRAIN DIODE CHARACTERISTICS Forward On–Voltage (1) (IS = 6.0 Adc, VGS = 0 Vdc) (IS = 6.0 Adc, VGS = 0 Vdc, TJ = 125°C) VSD — — trr (IS = 6.0 ( 6 0 Adc, Ad , VGS = 0 Vdc, Vd , dIS/dt = 100 A/µs) ta tb QRR LD LS — — — — 0.808 0.64 735 188 547 4.7 1.0 — — — — — µC ns Vdc — — — — — — — — 27 29 93 43 66 12.5 25.9 26 45 65 170 95 100 — — — nC ns (VDS = 25 Vdc, Vdc VGS = 0 Vdc, Vdc f = 1.0 MHz) Ciss Coss Crss — — — 3000 219 43 4210 440 90 pF VGS(th) 2.0 — RDS(on) VDS(on) — — gFS 4.0 8.0 — 7.2 14.4 12.6 — mhos — 3.0 7.0 1.28 4.0 — 1.5 Vdc mV/°C Ohm Vdc V(BR)DSS 1000 — IDSS — — IGSS — — — — 10 100 100 nAdc — 1,270 — — Vdc mV/°C µAdc Symbol Min Typ Max Unit Reverse Recovery Time (See Figure Fig re 14) Reverse Recovery Stored Charge INTERNAL PACKAGE INDUCTANCE Internal Drain Inductance (Measured from the drain lead 0.25″ from package to center of die) Internal Source Inductance (Measured from the source lead 0.25″ from package to source bond pad) (1) Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2%. (2) Switching characteristics are independent of operating junction temperature. — — 4.5 13 — — nH nH 2 Motorola TMOS Power MOSFET Transistor Device Data MT.


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