XC5VLX110 Datasheet PDF

R Platform Flash In-System Programmable Configuration PROMS Product Specification DS123 (v2.9) May 09, 2006 ...

R Platform Flash In-System Programmable Configuration PROMS Product Specification DS123 (v2.9) May 09, 2006 0 Features In-System Programmable PROMs for Configuration of Xilinx FPGAs Low-Power Advanced CMOS NOR FLASH Process Endurance of 20,000 Program/Erase Cycles Operation over Full Industrial Temperature Range (–40°C to +85°C) Boundary-Scan (JTAG) Support for Programming, Prototyping, and Testing JTAG Command Initiation of Standard FPGA Configuration Cascadable for Storing Longer or Multiple Bitstreams Dedicated Boundary-Scan (JTAG) I/O Power Supply (VCCJ) I/O Pins Compatible with Voltage Levels Ranging From 1.5V to 3.3V Design Support Using the Xilinx Alliance ISE and Foundation ISE Series Software Packages XCF01S/XCF02S/XCF04S ♦ ♦ ♦ 3.3V supply voltage Serial FPGA configuration interface (up to 33 MHz) Available in small-footprint VO20 and VOG20 packages. 1.8V supply voltage Serial or parallel FPGA configuration interface (up to 33 MHz) Available in small-footprint VO48, VOG48, FS48, and FSG48 packages Design revision technology enables storing and accessing multiple design revisions for configuration Built-in data decompressor compatible with Xilinx advanced compression technology w w w . D a IEEE t a S Standard h e e t 4 U . c o m 1149.1/1532 XCF08P/XCF16P/XCF32P ♦ ♦ ♦ ♦ ♦ Table 1: Platform Flash PROM Features Device Density VCCINT VCCO Range VCCJ Range Packages Program In-system via JTAG Serial Config. Parallel Config. Design...