MRFIC1502

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MRFIC1502/D The MRFIC Line Integrated GPS Downconverter This integrated circuit is intended for GPS receiver applications. The dual conversion design is implemented in Motorola’s low–cost high performance MOSAIC 3 silicon bipolar process and is packaged in a low–cost surface mount TQFP–48 package. In addition to the mixers, a VCO, a PLL and a loop filter are integrated on–chip. Output IF is nominally 9.5 MHz. 65 dB Minimum Conversion Gain 5 Volts Operation 50 mA Typical Current Consumption Low–Cost, Low Profile Plastic TQFP Package Device Marking = M1502 www.DataSheet4U.com MRFIC1502 1.575 GHz GPS DOWNCONVERTER CASE 932–02 (TQFP–48) GND 48 GND VCO VT GND VCC5 GND VCO CE GND SF CAP1 GND 1 2 3 4 5 6 7 8 9 GND 47 GND 46 GND 45 RF IN GND VCC1 GND 44 43 42 41 TO BPF 40 FROM BPF GND 39 38 GND 37 36 35 34 33 GND 38 MHz TRAP 38 MHz TRAP BYPASS CAP IF OUT VCC2 GND TQFP–48 ACTIVE FILTER VCO 40 2 32 31 30 29 GAIN CONTROL LOOP FILTER 28 VCC3 27 GND 26 GND 25 GND 13 C2A 14 C2B 15 C1 16 CA 17 CB 18 DCX0 19 20 21 CLK OUT 22 GND 23 GND 24 GND PHASE DETECTOR SF CAP2 10 GND 11 GND 12 VCC4 GND Pin Connections and Functional Block Diagram © Motorola, Inc. 1997 MOTOROLA RF DEVICE DATA MRFIC1502 1 MAXIMUM RATINGS Rating DC Supply Voltage DC Supply Current Operating Ambient Temperature Storage Temperature Range Lead Soldering Temperature Range (10 seconds) Symbol VDD IDD TA Tstg — Limit +6.0 60 –...