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MP1231A Dataheets PDF



Part Number MP1231A
Manufacturers Exar Corporation
Logo Exar Corporation
Description (MP1230A - MP1232A) CMOS Microprocessor Compatible Double-Buffered 12-Bit Digital-to-Analog Converter
Datasheet MP1231A DatasheetMP1231A Datasheet (PDF)

MP1230A/31A/32A CMOS Microprocessor Compatible Double-Buffered 12-Bit Digital-to-Analog Converter FEATURES • Superior Ruggedized 1230 Series: 2 KV ESD • Four Quadrant Multiplication • Stable, More Accurate Segmented DAC Approach – 0.2 ppm/°C Linearity Tempco – 2 ppm/°C Max Gain Error Tempco – Lowest Sensitivity to Amplifier Offset – Lowest Output Capacitance (COUT = 80pF) www.DataSheet4U.com – Lower Glitch Energy • Monotonic over Temperature Range • • • • • Lower Data Bus Feedthrough @ CS = 1 V.

  MP1231A   MP1231A


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MP1230A/31A/32A CMOS Microprocessor Compatible Double-Buffered 12-Bit Digital-to-Analog Converter FEATURES • Superior Ruggedized 1230 Series: 2 KV ESD • Four Quadrant Multiplication • Stable, More Accurate Segmented DAC Approach – 0.2 ppm/°C Linearity Tempco – 2 ppm/°C Max Gain Error Tempco – Lowest Sensitivity to Amplifier Offset – Lowest Output Capacitance (COUT = 80pF) www.DataSheet4U.com – Lower Glitch Energy • Monotonic over Temperature Range • • • • • Lower Data Bus Feedthrough @ CS = 1 VDD from +11 V to +16 V Latch-Up Free CMOS Technology 12-Bit Bus Version: MP1208/1209/1210 16-Bit Upgrade: MP7636A GENERAL DESCRIPTION The MP1230A series are superior pin for pin replacements for the 1230 series. The MP1230A series is manufactured using advanced thin film resistors on a double metal CMOS process which promotes significant improvements in reliability, latch-up free performance and ESD protection. The MP1230A series incorporates a unique decoding technique yielding lower glitch, higher speed and excellent accuracy over temperature and time. 12-bit linearity is achieved without trimming. Outstanding features include: – Stability: integral and differential linearity tempcos are rated at 0.2 ppm/°C typical. Monotonicity is guaranteed over all temperature ranges. Scale factor tempco is a low 2 ppm/°C maximum. – Low Output Capacitance: Due to smaller MOSFET switch geometries allowed by decoding, the output capacitance at IOUT1 and IOUT2 is a low 80pF / 40pF and 25pF / 65 pF. This less than half the competitive DAC 1230 series. Lower capacitance allows the MP1230A series to achieve settling times faster than 1 µs for a 10 V step. Low Sensitivity to Output Amplifier Offset: The linearity error caused by amplifier offset is reduced by a factor of 2 in the MP1230A series over conventional R-2R DACs. – The MP1230A series uses a circuit which reduces transients in the supplies caused by DATA bus transitions at CS = 1. SIMPLIFIED BLOCK DIAGRAM VDD INPUT LATCH DB11-DB4 DB3-DB0 BYTE1/BYTE2 D 8 8 VREF RFB VREF IOUT1 IOUT2 DAC LATCH D Q Q 8 12 LE LE D 4 Q 4 12 CS WR1 LE XFER WR2 DGND AGND Rev. 2.00 1 MP1230A/31A/32A ORDERING INFORMATION Package Type Plastic Dip Plastic Dip Plastic Dip SOIC SOIC SOIC www.DataSheet4U.com Temperature Range –40 to +85°C –40 to +85°C –40 to +85°C –40 to +85°C –40 to +85°C –40 to +85°C Part No. MP1230ABN MP1231ABN MP1232ABN MP1230ABS MP1231ABS MP1232ABS INL (LSB) +1/2 +1 +2 +1/2 +1 +2 DNL (LSB) +3/4 +1 +2 +3/4 +1 +2 Gain Error (% FSR) +0.4 +0.4 +0.4 +0.4 +0.4 +0.4 PIN CONFIGURATIONS CS WR1 AGND DB7 DB6 DB5 DB4 VREF RFB DGND 1 2 3 4 5 6 7 8 9 10 See Packaging Section for Package Dimensions 20 19 18 17 16 15 14 13 12 11 VDD BYTE1/BYTE2 WR2 XFER DB8 (DB0, LSB) DB9 (DB1) DB10 (DB2) DB11 MSB (DB3) IOUT2 IOUT1 CS WR1 AGND DB7 DB6 DB5 DB4 VREF RFB DGND 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VDD BYTE1/BYTE2 WR2 XFER DB8 (DB0, LSB) DB9 (DB1) DB10 (DB2) DB11 MSB (DB3) IOUT2 IOUT1 20 Pin PDIP (0.300”) N20 20 Pin SOIC (Jedec, 0.300”) S20 PIN OUT DEFINITIONS PIN NO. 1 2 3 4 5 6 7 8 9 10 11 NAME CS WR1 AGND DB7 DB6 DB5 DB4 VREF RFB DGND IOUT1 DESCRIPTION Chip Select (Active Low) Write 1 (Active Low) Analog Ground Data Input Bit 7 Data Input Bit 6 Data Input Bit 5 Data Input Bit 4 Reference Input Voltage Feedback Resistor Digital Ground Current Output 1 20 16 17 18 19 DB8 (DB0) XFER WR2 BYTE1/ BYTE2 VDD 14 15 DB10 (DB2) DB9 (DB1) PIN NO. 12 13 NAME IOUT2 DB11 (DB3) DESCRIPTION Current Output 2 Data Input Bit 11 (MSB) Data Input Bit 3 Data Input Bit 10 Data Input Bit 2 Data Input Bit 9 Data Input Bit 1 Data Input Bit 8 Data Input Bit 0 (LSB) Transfer Control Signal (Active Low) Write 2 (Active Low) Byte Sequence Control Positive Power Supply Rev. 2.00 2 MP1230A/31A/32A ELECTRICAL CHARACTERISTICS (VDD = + 15 V, VREF = +10 V unless otherwise noted) Parameter STATIC PERFORMANCE1 Resolution (All Grades) Integral Non-Linearity (Relative Accuracy) MP1230ABN/ATD/ABS MP1231ABN/ATD/ABS MP1232ABN/ATD/ABS www.DataSheet4U.com Differential Non-Linearity MP1230ABN/ATD/ABS MP1231ABN/ATD/ABS MP1232ABN/ATD/ABS Gain Error Gain Temperature Coefficient2 Power Supply Rejection Ratio Output Leakage Current DYNAMIC PERFORMANCE2 Current Settling Time AC Feedthrough at IOUT1 REFERENCE INPUT Input Resistance DIGITAL INPUTS Logical “1” Voltage Logical “0” Voltage Input Leakage Current Input Capacitance2 ANALOG OUTPUTS2 Output Capacitance COUT1 COUT1 COUT2 COUT2 POWER SUPPLY Functional Voltage Range4 Supply Current VDD IDD +4.5 1.2 +16 2.0 +4.5 +16 2.0 V mA 80 40 65 25 100 60 85 45 100 60 85 45 pF pF pF pF DAC Inputs all 1’s DAC Inputs all 0’s DAC Inputs all 1’s DAC Inputs all 0’s VIH VIL ILKG 10 3.0 2.4 0.8 +1 3.0 0.8 +1 V V µA pF RIN 5 10 20 5 20 kΩ tS FT 1.0 1.0 µsec mV p-p N INL +1/2 +1 +2 DNL +3/4 +1 +2 GE TCGE PSRR IOUT 0.5 5 1 +20 +10 +0.4 +3/4 +1 +2 +0.4 +2 +20 +200 % FSR ppm/°C ppm/% nA RL=100Ω, CL=13pF Full Scale Change to 1/2 LSB VREF=100kHz, 20Vp-p, sinewave Using Internal RF.


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