DatasheetsPDF.com

ICS951402

ICS

Programmable Timing Control-Hub processor

www.DataSheet4U.com Integrated Circuit Systems, Inc. ICS951402 Advance Information Programmable Timing Control Hub™ f...


ICS

ICS951402

File Download Download ICS951402 Datasheet


Description
www.DataSheet4U.com Integrated Circuit Systems, Inc. ICS951402 Advance Information Programmable Timing Control Hub™ for P4™ processor Recommended Application: ATI chipset, P4 system, Banias system Output Features: 2 - Pairs of differential CPUCLKs (differential current mode) 1 - SDRAM @ 3.3V 8 - PCI @3.3V (selectable 33/66 MHz) (2 free-running) 2 - AGP @ 3.3V 2- 48MHz, @3.3V fixed. 1- 24/48MHz, @3.3V selectable by I2C (Default is 24MHz) 3- REF @3.3V, 14.318MHz. Features/Benefits: Support for Intel Banias power management features Programmable output frequency, divider ratios, output rise/ falltime, output skew. Programmable spread percentage for EMI control. Watchdog timer technology to reset system if system malfunctions. Programmable watch dog safe frequency. Support I2C Index read/write and block read/write operations. Supports spread spectrum for EMI reduction; default is spread spectrum ON. Pin Configuration VDDREF FS0/REF0 FS1/REF1 FS2/REF2 GNDREF X1 X2 GND VDD *VttPWR_GD/PD# PCI66/33#_SEL PCI_STOP#* VDDPCI FS3/PCICLK_F0 FS4/PCICLK_F1 PCICLK0 PCICLK1 GNDPCI VDDPCI PCICLK2 PCICLK3 PCICLK4 PCICLK5 GNDPCI 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 VDDSDR SDRAM_OUT GNDSDR CPU_STOP#* CPUCLKT1 CPUCLKC1 VDDCPU GNDCPU CPUCLKT0 CPUCLKC0 IREF GND AVDD SCLK SDATA GNDAGP AGPCLK0 AGPCLK1 VDDAGP AVDD48 48MHz_0 48MHz_1 24_48MHz/SEL24_48#MHz** GND48 48-Pin TSSOP ...




Similar Datasheet




@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (Privacy Policy & Contact)