UG64T6400L8DU

www.DataSheet4U.com UG64T6400L8DU Data sheets can be downloaded at www.unigen.com SYNCHRONOUS DRAM MODULE FEATURES 240-pin, dual in-line memory module (DIMM) Fast data transfer rates: PC2-3200 or PC2-4200 Utilizes 400 MT/s and 533 MT/s DDR2 SDRAM components VDD = +1.8V ± 0.1V, VDDQ = +1.8V ± 0.1V VDDSDP = +1.7V to +3.6V JEDEC standard 1.8V I/O (SSTL_18-compatible) Differential data strobe (DQS, /DQS) option Four-bit prefetch architecture Differential clock inputs (CK, /CK) Commands entered on each rising CK edge DQS edge-aligned with data for READs DQS center-aligned with data for WRITEs DLL to align DQ and DQS transitions with CK Four or eight internal device banks for concurrent operation Data mask (DM) for masking write data Programmable /CAS latency (CL): 3 and 4 Posted /CAS additive latency (AL): 0, 1, 2, 3, and 4 WRITE latency = READ latency - 1 t CK Programmable burst lengths: 4 or 8 READ burst interrupt supported by another READ WRITE burst interrupt supported by another WRITE Adjustable data-output drive strength Concurrent auto precharge option is supported Auto Refresh (CBR) and Self Refresh Mode 7.8125µs maximum average periodic refresh interval 64ms, 8,192-cycle refresh Off-chip driver (OCD) impedance calibration On-die termination (ODT) Serial Presence Detect (SPD) with EEPROM Gold edge contacts PCB : Height (1180mil), single sided component 512M Bytes (64M x 64 bits) 240 Pin DDR2 SDRAM Unbuffered ...